stm32l1xx_hal_spi.c 67 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_spi.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 5-September-2014
  7. * @brief SPI HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The SPI HAL driver can be used as follows:
  21. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  22. SPI_HandleTypeDef hspi;
  23. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  24. (##) Enable the SPIx interface clock
  25. (##) SPI pins configuration
  26. (+++) Enable the clock for the SPI GPIOs
  27. (+++) Configure these SPI pins as alternate function push-pull
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the SPIx interrupt priority
  30. (+++) Enable the NVIC SPI IRQ handle
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
  33. (+++) Enable the DMAx clock
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Channel
  36. (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
  38. (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  39. management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  40. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  41. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  42. by calling the customed HAL_SPI_MspInit() API.
  43. [..]
  44. Circular mode restriction:
  45. (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  46. (##) Master 2Lines RxOnly
  47. (##) Master 1Line Rx
  48. (#) The CRC feature is not managed when the DMA circular mode is enabled
  49. (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  50. the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  51. @endverbatim
  52. ******************************************************************************
  53. * @attention
  54. *
  55. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  56. *
  57. * Redistribution and use in source and binary forms, with or without modification,
  58. * are permitted provided that the following conditions are met:
  59. * 1. Redistributions of source code must retain the above copyright notice,
  60. * this list of conditions and the following disclaimer.
  61. * 2. Redistributions in binary form must reproduce the above copyright notice,
  62. * this list of conditions and the following disclaimer in the documentation
  63. * and/or other materials provided with the distribution.
  64. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  65. * may be used to endorse or promote products derived from this software
  66. * without specific prior written permission.
  67. *
  68. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  69. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  70. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  71. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  72. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  73. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  74. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  75. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  76. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  77. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78. *
  79. ******************************************************************************
  80. */
  81. /* Includes ------------------------------------------------------------------*/
  82. #include "stm32l1xx_hal.h"
  83. /** @addtogroup STM32L1xx_HAL_Driver
  84. * @{
  85. */
  86. /** @defgroup SPI SPI
  87. * @brief SPI HAL module driver
  88. * @{
  89. */
  90. #ifdef HAL_SPI_MODULE_ENABLED
  91. /* Private typedef -----------------------------------------------------------*/
  92. /* Private define ------------------------------------------------------------*/
  93. /** @defgroup SPI_Private_Constants SPI Private Constants
  94. * @{
  95. */
  96. #define SPI_TIMEOUT_VALUE 10
  97. /**
  98. * @}
  99. */
  100. /* Private macro -------------------------------------------------------------*/
  101. /* Private variables ---------------------------------------------------------*/
  102. /* Private function prototypes -----------------------------------------------*/
  103. /** @defgroup SPI_Private_Functions SPI Private Functions
  104. * @{
  105. */
  106. static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
  107. static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi);
  108. static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
  109. static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi);
  110. static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi);
  111. static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma);
  112. static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  113. static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  114. static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma);
  115. static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  116. static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  117. static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma);
  118. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  119. /**
  120. * @}
  121. */
  122. /* Exported functions ---------------------------------------------------------*/
  123. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  124. * @{
  125. */
  126. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  127. * @brief Initialization and Configuration functions
  128. *
  129. @verbatim
  130. ===============================================================================
  131. ##### Initialization and de-initialization functions #####
  132. ===============================================================================
  133. [..] This subsection provides a set of functions allowing to initialize and
  134. de-initialiaze the SPIx peripheral:
  135. (+) User must implement HAL_SPI_MspInit() function in which he configures
  136. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  137. (+) Call the function HAL_SPI_Init() to configure the selected device with
  138. the selected configuration:
  139. (++) Mode
  140. (++) Direction
  141. (++) Data Size
  142. (++) Clock Polarity and Phase
  143. (++) NSS Management
  144. (++) BaudRate Prescaler
  145. (++) FirstBit
  146. (++) TIMode
  147. (++) CRC Calculation
  148. (++) CRC Polynomial if CRC enabled
  149. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  150. of the selected SPIx periperal.
  151. @endverbatim
  152. * @{
  153. */
  154. /**
  155. * @brief Initializes the SPI according to the specified parameters
  156. * in the SPI_InitTypeDef and create the associated handle.
  157. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  158. * the configuration information for SPI module.
  159. * @retval HAL status
  160. */
  161. __weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  162. {
  163. return HAL_ERROR;
  164. }
  165. /**
  166. * @brief DeInitializes the SPI peripheral
  167. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  168. * the configuration information for SPI module.
  169. * @retval HAL status
  170. */
  171. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  172. {
  173. /* Check the SPI handle allocation */
  174. if(hspi == NULL)
  175. {
  176. return HAL_ERROR;
  177. }
  178. /* Disable the SPI Peripheral Clock */
  179. __HAL_SPI_DISABLE(hspi);
  180. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  181. HAL_SPI_MspDeInit(hspi);
  182. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  183. hspi->State = HAL_SPI_STATE_RESET;
  184. /* Release Lock */
  185. __HAL_UNLOCK(hspi);
  186. return HAL_OK;
  187. }
  188. /**
  189. * @brief SPI MSP Init
  190. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  191. * the configuration information for SPI module.
  192. * @retval None
  193. */
  194. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  195. {
  196. /* NOTE : This function Should not be modified, when the callback is needed,
  197. the HAL_SPI_MspInit could be implenetd in the user file
  198. */
  199. }
  200. /**
  201. * @brief SPI MSP DeInit
  202. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  203. * the configuration information for SPI module.
  204. * @retval None
  205. */
  206. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  207. {
  208. /* NOTE : This function Should not be modified, when the callback is needed,
  209. the HAL_SPI_MspDeInit could be implenetd in the user file
  210. */
  211. }
  212. /**
  213. * @}
  214. */
  215. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  216. * @brief Data transfers functions
  217. *
  218. @verbatim
  219. ==============================================================================
  220. ##### IO operation functions #####
  221. ===============================================================================
  222. This subsection provides a set of functions allowing to manage the SPI
  223. data transfers.
  224. [..] The SPI supports master and slave mode :
  225. (#) There are two modes of transfer:
  226. (++) Blocking mode: The communication is performed in polling mode.
  227. The HAL status of all data processing is returned by the same function
  228. after finishing transfer.
  229. (++) No-Blocking mode: The communication is performed using Interrupts
  230. or DMA, These APIs return the HAL status.
  231. The end of the data processing will be indicated through the
  232. dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  233. using DMA mode.
  234. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  235. will be executed respectivelly at the end of the transmit or Receive process
  236. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  237. (#) Blocking mode APIs are :
  238. (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
  239. (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
  240. (++) HAL_SPI_TransmitReceive() in full duplex mode
  241. (#) Non Blocking mode API's with Interrupt are :
  242. (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
  243. (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
  244. (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
  245. (++) HAL_SPI_IRQHandler()
  246. (#) Non Blocking mode functions with DMA are :
  247. (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
  248. (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
  249. (++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
  250. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  251. (++) HAL_SPI_TxCpltCallback()
  252. (++) HAL_SPI_RxCpltCallback()
  253. (++) HAL_SPI_TxRxCpltCallback()
  254. (++) HAL_SPI_TxHalfCpltCallback()
  255. (++) HAL_SPI_RxHalfCpltCallback()
  256. (++) HAL_SPI_TxRxHalfCpltCallback()
  257. (++) HAL_SPI_ErrorCallback()
  258. @endverbatim
  259. * @{
  260. */
  261. /**
  262. * @brief Transmit an amount of data in blocking mode
  263. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  264. * the configuration information for SPI module.
  265. * @param pData: pointer to data buffer
  266. * @param Size: amount of data to be sent
  267. * @param Timeout: Timeout duration
  268. * @retval HAL status
  269. */
  270. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  271. {
  272. if(hspi->State == HAL_SPI_STATE_READY)
  273. {
  274. if((pData == NULL ) || (Size == 0))
  275. {
  276. return HAL_ERROR;
  277. }
  278. /* Check the parameters */
  279. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  280. /* Process Locked */
  281. __HAL_LOCK(hspi);
  282. /* Configure communication */
  283. hspi->State = HAL_SPI_STATE_BUSY_TX;
  284. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  285. hspi->pTxBuffPtr = pData;
  286. hspi->TxXferSize = Size;
  287. hspi->TxXferCount = Size;
  288. /*Init field not used in handle to zero */
  289. hspi->TxISR = 0;
  290. hspi->RxISR = 0;
  291. hspi->pRxBuffPtr = NULL;
  292. hspi->RxXferSize = 0;
  293. hspi->RxXferCount = 0;
  294. /* Reset CRC Calculation */
  295. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  296. {
  297. SPI_RESET_CRC(hspi);
  298. }
  299. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  300. {
  301. /* Configure communication direction : 1Line */
  302. SPI_1LINE_TX(hspi);
  303. }
  304. /* Check if the SPI is already enabled */
  305. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  306. {
  307. /* Enable SPI peripheral */
  308. __HAL_SPI_ENABLE(hspi);
  309. }
  310. /* Transmit data in 8 Bit mode */
  311. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  312. {
  313. if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
  314. {
  315. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  316. hspi->TxXferCount--;
  317. }
  318. while(hspi->TxXferCount > 0)
  319. {
  320. /* Wait until TXE flag is set to send data */
  321. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  322. {
  323. return HAL_TIMEOUT;
  324. }
  325. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  326. hspi->TxXferCount--;
  327. }
  328. /* Enable CRC Transmission */
  329. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  330. {
  331. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  332. }
  333. }
  334. /* Transmit data in 16 Bit mode */
  335. else
  336. {
  337. if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
  338. {
  339. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  340. hspi->pTxBuffPtr+=2;
  341. hspi->TxXferCount--;
  342. }
  343. while(hspi->TxXferCount > 0)
  344. {
  345. /* Wait until TXE flag is set to send data */
  346. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  347. {
  348. return HAL_TIMEOUT;
  349. }
  350. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  351. hspi->pTxBuffPtr+=2;
  352. hspi->TxXferCount--;
  353. }
  354. /* Enable CRC Transmission */
  355. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  356. {
  357. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  358. }
  359. }
  360. /* Wait until TXE flag is set to send data */
  361. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  362. {
  363. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  364. return HAL_TIMEOUT;
  365. }
  366. /* Wait until Busy flag is reset before disabling SPI */
  367. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  368. {
  369. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  370. return HAL_TIMEOUT;
  371. }
  372. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  373. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  374. {
  375. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  376. }
  377. hspi->State = HAL_SPI_STATE_READY;
  378. /* Process Unlocked */
  379. __HAL_UNLOCK(hspi);
  380. return HAL_OK;
  381. }
  382. else
  383. {
  384. return HAL_BUSY;
  385. }
  386. }
  387. /**
  388. * @brief Receive an amount of data in blocking mode
  389. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  390. * the configuration information for SPI module.
  391. * @param pData: pointer to data buffer
  392. * @param Size: amount of data to be sent
  393. * @param Timeout: Timeout duration
  394. * @retval HAL status
  395. */
  396. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  397. {
  398. __IO uint16_t tmpreg = 0;
  399. if(hspi->State == HAL_SPI_STATE_READY)
  400. {
  401. if((pData == NULL ) || (Size == 0))
  402. {
  403. return HAL_ERROR;
  404. }
  405. /* Process Locked */
  406. __HAL_LOCK(hspi);
  407. /* Configure communication */
  408. hspi->State = HAL_SPI_STATE_BUSY_RX;
  409. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  410. hspi->pRxBuffPtr = pData;
  411. hspi->RxXferSize = Size;
  412. hspi->RxXferCount = Size;
  413. /*Init field not used in handle to zero */
  414. hspi->RxISR = 0;
  415. hspi->TxISR = 0;
  416. hspi->pTxBuffPtr = NULL;
  417. hspi->TxXferSize = 0;
  418. hspi->TxXferCount = 0;
  419. /* Configure communication direction : 1Line */
  420. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  421. {
  422. SPI_1LINE_RX(hspi);
  423. }
  424. /* Reset CRC Calculation */
  425. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  426. {
  427. SPI_RESET_CRC(hspi);
  428. }
  429. if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  430. {
  431. /* Process Unlocked */
  432. __HAL_UNLOCK(hspi);
  433. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  434. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  435. }
  436. /* Check if the SPI is already enabled */
  437. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  438. {
  439. /* Enable SPI peripheral */
  440. __HAL_SPI_ENABLE(hspi);
  441. }
  442. /* Receive data in 8 Bit mode */
  443. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  444. {
  445. while(hspi->RxXferCount > 1)
  446. {
  447. /* Wait until RXNE flag is set */
  448. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  449. {
  450. return HAL_TIMEOUT;
  451. }
  452. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  453. hspi->RxXferCount--;
  454. }
  455. /* Enable CRC Transmission */
  456. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  457. {
  458. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  459. }
  460. }
  461. /* Receive data in 16 Bit mode */
  462. else
  463. {
  464. while(hspi->RxXferCount > 1)
  465. {
  466. /* Wait until RXNE flag is set to read data */
  467. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  468. {
  469. return HAL_TIMEOUT;
  470. }
  471. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  472. hspi->pRxBuffPtr+=2;
  473. hspi->RxXferCount--;
  474. }
  475. /* Enable CRC Transmission */
  476. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  477. {
  478. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  479. }
  480. }
  481. /* Wait until RXNE flag is set */
  482. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  483. {
  484. return HAL_TIMEOUT;
  485. }
  486. /* Receive last data in 8 Bit mode */
  487. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  488. {
  489. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  490. }
  491. /* Receive last data in 16 Bit mode */
  492. else
  493. {
  494. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  495. hspi->pRxBuffPtr+=2;
  496. }
  497. hspi->RxXferCount--;
  498. /* Wait until RXNE flag is set: CRC Received */
  499. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  500. {
  501. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  502. {
  503. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  504. return HAL_TIMEOUT;
  505. }
  506. /* Read CRC to Flush RXNE flag */
  507. tmpreg = hspi->Instance->DR;
  508. }
  509. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  510. {
  511. /* Disable SPI peripheral */
  512. __HAL_SPI_DISABLE(hspi);
  513. }
  514. hspi->State = HAL_SPI_STATE_READY;
  515. /* Check if CRC error occurred */
  516. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  517. {
  518. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  519. /* Reset CRC Calculation */
  520. SPI_RESET_CRC(hspi);
  521. /* Process Unlocked */
  522. __HAL_UNLOCK(hspi);
  523. return HAL_ERROR;
  524. }
  525. /* Process Unlocked */
  526. __HAL_UNLOCK(hspi);
  527. return HAL_OK;
  528. }
  529. else
  530. {
  531. return HAL_BUSY;
  532. }
  533. }
  534. /**
  535. * @brief Transmit and Receive an amount of data in blocking mode
  536. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  537. * the configuration information for SPI module.
  538. * @param pTxData: pointer to transmission data buffer
  539. * @param pRxData: pointer to reception data buffer to be
  540. * @param Size: amount of data to be sent
  541. * @param Timeout: Timeout duration
  542. * @retval HAL status
  543. */
  544. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  545. {
  546. __IO uint16_t tmpreg = 0;
  547. if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
  548. {
  549. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  550. {
  551. return HAL_ERROR;
  552. }
  553. /* Check the parameters */
  554. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  555. /* Process Locked */
  556. __HAL_LOCK(hspi);
  557. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  558. if(hspi->State == HAL_SPI_STATE_READY)
  559. {
  560. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  561. }
  562. /* Configure communication */
  563. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  564. hspi->pRxBuffPtr = pRxData;
  565. hspi->RxXferSize = Size;
  566. hspi->RxXferCount = Size;
  567. hspi->pTxBuffPtr = pTxData;
  568. hspi->TxXferSize = Size;
  569. hspi->TxXferCount = Size;
  570. /*Init field not used in handle to zero */
  571. hspi->RxISR = 0;
  572. hspi->TxISR = 0;
  573. /* Reset CRC Calculation */
  574. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  575. {
  576. SPI_RESET_CRC(hspi);
  577. }
  578. /* Check if the SPI is already enabled */
  579. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  580. {
  581. /* Enable SPI peripheral */
  582. __HAL_SPI_ENABLE(hspi);
  583. }
  584. /* Transmit and Receive data in 16 Bit mode */
  585. if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  586. {
  587. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  588. {
  589. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  590. hspi->pTxBuffPtr+=2;
  591. hspi->TxXferCount--;
  592. }
  593. if(hspi->TxXferCount == 0)
  594. {
  595. /* Enable CRC Transmission */
  596. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  597. {
  598. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  599. }
  600. /* Wait until RXNE flag is set */
  601. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  602. {
  603. return HAL_TIMEOUT;
  604. }
  605. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  606. hspi->pRxBuffPtr+=2;
  607. hspi->RxXferCount--;
  608. }
  609. else
  610. {
  611. while(hspi->TxXferCount > 0)
  612. {
  613. /* Wait until TXE flag is set to send data */
  614. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  615. {
  616. return HAL_TIMEOUT;
  617. }
  618. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  619. hspi->pTxBuffPtr+=2;
  620. hspi->TxXferCount--;
  621. /* Enable CRC Transmission */
  622. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
  623. {
  624. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  625. }
  626. /* Wait until RXNE flag is set */
  627. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  628. {
  629. return HAL_TIMEOUT;
  630. }
  631. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  632. hspi->pRxBuffPtr+=2;
  633. hspi->RxXferCount--;
  634. }
  635. /* Receive the last byte */
  636. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  637. {
  638. /* Wait until RXNE flag is set */
  639. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  640. {
  641. return HAL_TIMEOUT;
  642. }
  643. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  644. hspi->pRxBuffPtr+=2;
  645. hspi->RxXferCount--;
  646. }
  647. }
  648. }
  649. /* Transmit and Receive data in 8 Bit mode */
  650. else
  651. {
  652. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  653. {
  654. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  655. hspi->TxXferCount--;
  656. }
  657. if(hspi->TxXferCount == 0)
  658. {
  659. /* Enable CRC Transmission */
  660. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  661. {
  662. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  663. }
  664. /* Wait until RXNE flag is set */
  665. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  666. {
  667. return HAL_TIMEOUT;
  668. }
  669. (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  670. hspi->RxXferCount--;
  671. }
  672. else
  673. {
  674. while(hspi->TxXferCount > 0)
  675. {
  676. /* Wait until TXE flag is set to send data */
  677. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  678. {
  679. return HAL_TIMEOUT;
  680. }
  681. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  682. hspi->TxXferCount--;
  683. /* Enable CRC Transmission */
  684. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
  685. {
  686. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  687. }
  688. /* Wait until RXNE flag is set */
  689. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  690. {
  691. return HAL_TIMEOUT;
  692. }
  693. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  694. hspi->RxXferCount--;
  695. }
  696. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  697. {
  698. /* Wait until RXNE flag is set */
  699. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  700. {
  701. return HAL_TIMEOUT;
  702. }
  703. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  704. hspi->RxXferCount--;
  705. }
  706. }
  707. }
  708. /* Read CRC from DR to close CRC calculation process */
  709. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  710. {
  711. /* Wait until RXNE flag is set */
  712. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  713. {
  714. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  715. return HAL_TIMEOUT;
  716. }
  717. /* Read CRC */
  718. tmpreg = hspi->Instance->DR;
  719. }
  720. /* Wait until Busy flag is reset before disabling SPI */
  721. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  722. {
  723. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  724. return HAL_TIMEOUT;
  725. }
  726. hspi->State = HAL_SPI_STATE_READY;
  727. /* Check if CRC error occurred */
  728. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  729. {
  730. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  731. /* Reset CRC Calculation */
  732. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  733. {
  734. SPI_RESET_CRC(hspi);
  735. }
  736. /* Process Unlocked */
  737. __HAL_UNLOCK(hspi);
  738. return HAL_ERROR;
  739. }
  740. /* Process Unlocked */
  741. __HAL_UNLOCK(hspi);
  742. return HAL_OK;
  743. }
  744. else
  745. {
  746. return HAL_BUSY;
  747. }
  748. }
  749. /**
  750. * @brief Transmit an amount of data in no-blocking mode with Interrupt
  751. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  752. * the configuration information for SPI module.
  753. * @param pData: pointer to data buffer
  754. * @param Size: amount of data to be sent
  755. * @retval HAL status
  756. */
  757. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  758. {
  759. if(hspi->State == HAL_SPI_STATE_READY)
  760. {
  761. if((pData == NULL) || (Size == 0))
  762. {
  763. return HAL_ERROR;
  764. }
  765. /* Check the parameters */
  766. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  767. /* Process Locked */
  768. __HAL_LOCK(hspi);
  769. /* Configure communication */
  770. hspi->State = HAL_SPI_STATE_BUSY_TX;
  771. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  772. hspi->TxISR = &SPI_TxISR;
  773. hspi->pTxBuffPtr = pData;
  774. hspi->TxXferSize = Size;
  775. hspi->TxXferCount = Size;
  776. /*Init field not used in handle to zero */
  777. hspi->RxISR = 0;
  778. hspi->pRxBuffPtr = NULL;
  779. hspi->RxXferSize = 0;
  780. hspi->RxXferCount = 0;
  781. /* Configure communication direction : 1Line */
  782. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  783. {
  784. SPI_1LINE_TX(hspi);
  785. }
  786. /* Reset CRC Calculation */
  787. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  788. {
  789. SPI_RESET_CRC(hspi);
  790. }
  791. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  792. {
  793. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  794. }else
  795. {
  796. /* Enable TXE and ERR interrupt */
  797. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  798. }
  799. /* Process Unlocked */
  800. __HAL_UNLOCK(hspi);
  801. /* Check if the SPI is already enabled */
  802. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  803. {
  804. /* Enable SPI peripheral */
  805. __HAL_SPI_ENABLE(hspi);
  806. }
  807. return HAL_OK;
  808. }
  809. else
  810. {
  811. return HAL_BUSY;
  812. }
  813. }
  814. /**
  815. * @brief Receive an amount of data in no-blocking mode with Interrupt
  816. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  817. * the configuration information for SPI module.
  818. * @param pData: pointer to data buffer
  819. * @param Size: amount of data to be sent
  820. * @retval HAL status
  821. */
  822. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  823. {
  824. if(hspi->State == HAL_SPI_STATE_READY)
  825. {
  826. if((pData == NULL) || (Size == 0))
  827. {
  828. return HAL_ERROR;
  829. }
  830. /* Process Locked */
  831. __HAL_LOCK(hspi);
  832. /* Configure communication */
  833. hspi->State = HAL_SPI_STATE_BUSY_RX;
  834. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  835. hspi->RxISR = &SPI_RxISR;
  836. hspi->pRxBuffPtr = pData;
  837. hspi->RxXferSize = Size;
  838. hspi->RxXferCount = Size ;
  839. /*Init field not used in handle to zero */
  840. hspi->TxISR = 0;
  841. hspi->pTxBuffPtr = NULL;
  842. hspi->TxXferSize = 0;
  843. hspi->TxXferCount = 0;
  844. /* Configure communication direction : 1Line */
  845. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  846. {
  847. SPI_1LINE_RX(hspi);
  848. }
  849. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  850. {
  851. /* Process Unlocked */
  852. __HAL_UNLOCK(hspi);
  853. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  854. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  855. }
  856. /* Reset CRC Calculation */
  857. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  858. {
  859. SPI_RESET_CRC(hspi);
  860. }
  861. /* Enable TXE and ERR interrupt */
  862. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  863. /* Process Unlocked */
  864. __HAL_UNLOCK(hspi);
  865. /* Note : The SPI must be enabled after unlocking current process
  866. to avoid the risk of SPI interrupt handle execution before current
  867. process unlock */
  868. /* Check if the SPI is already enabled */
  869. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  870. {
  871. /* Enable SPI peripheral */
  872. __HAL_SPI_ENABLE(hspi);
  873. }
  874. return HAL_OK;
  875. }
  876. else
  877. {
  878. return HAL_BUSY;
  879. }
  880. }
  881. /**
  882. * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
  883. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  884. * the configuration information for SPI module.
  885. * @param pTxData: pointer to transmission data buffer
  886. * @param pRxData: pointer to reception data buffer to be
  887. * @param Size: amount of data to be sent
  888. * @retval HAL status
  889. */
  890. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  891. {
  892. if((hspi->State == HAL_SPI_STATE_READY) || \
  893. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  894. {
  895. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  896. {
  897. return HAL_ERROR;
  898. }
  899. /* Check the parameters */
  900. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  901. /* Process locked */
  902. __HAL_LOCK(hspi);
  903. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  904. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  905. {
  906. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  907. }
  908. /* Configure communication */
  909. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  910. hspi->TxISR = &SPI_TxISR;
  911. hspi->pTxBuffPtr = pTxData;
  912. hspi->TxXferSize = Size;
  913. hspi->TxXferCount = Size;
  914. hspi->RxISR = &SPI_2LinesRxISR;
  915. hspi->pRxBuffPtr = pRxData;
  916. hspi->RxXferSize = Size;
  917. hspi->RxXferCount = Size;
  918. /* Reset CRC Calculation */
  919. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  920. {
  921. SPI_RESET_CRC(hspi);
  922. }
  923. /* Enable TXE, RXNE and ERR interrupt */
  924. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  925. /* Process Unlocked */
  926. __HAL_UNLOCK(hspi);
  927. /* Check if the SPI is already enabled */
  928. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  929. {
  930. /* Enable SPI peripheral */
  931. __HAL_SPI_ENABLE(hspi);
  932. }
  933. return HAL_OK;
  934. }
  935. else
  936. {
  937. return HAL_BUSY;
  938. }
  939. }
  940. /**
  941. * @brief Transmit an amount of data in no-blocking mode with DMA
  942. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  943. * the configuration information for SPI module.
  944. * @param pData: pointer to data buffer
  945. * @param Size: amount of data to be sent
  946. * @retval HAL status
  947. */
  948. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  949. {
  950. if(hspi->State == HAL_SPI_STATE_READY)
  951. {
  952. if((pData == NULL) || (Size == 0))
  953. {
  954. return HAL_ERROR;
  955. }
  956. /* Check the parameters */
  957. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  958. /* Process Locked */
  959. __HAL_LOCK(hspi);
  960. /* Configure communication */
  961. hspi->State = HAL_SPI_STATE_BUSY_TX;
  962. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  963. hspi->pTxBuffPtr = pData;
  964. hspi->TxXferSize = Size;
  965. hspi->TxXferCount = Size;
  966. /*Init field not used in handle to zero */
  967. hspi->TxISR = 0;
  968. hspi->RxISR = 0;
  969. hspi->pRxBuffPtr = NULL;
  970. hspi->RxXferSize = 0;
  971. hspi->RxXferCount = 0;
  972. /* Configure communication direction : 1Line */
  973. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  974. {
  975. SPI_1LINE_TX(hspi);
  976. }
  977. /* Reset CRC Calculation */
  978. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  979. {
  980. SPI_RESET_CRC(hspi);
  981. }
  982. /* Set the SPI TxDMA Half transfer complete callback */
  983. hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  984. /* Set the SPI TxDMA transfer complete callback */
  985. hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  986. /* Set the DMA error callback */
  987. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  988. /* Enable the Tx DMA Channel */
  989. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  990. /* Enable Tx DMA Request */
  991. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  992. /* Process Unlocked */
  993. __HAL_UNLOCK(hspi);
  994. /* Check if the SPI is already enabled */
  995. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  996. {
  997. /* Enable SPI peripheral */
  998. __HAL_SPI_ENABLE(hspi);
  999. }
  1000. return HAL_OK;
  1001. }
  1002. else
  1003. {
  1004. return HAL_BUSY;
  1005. }
  1006. }
  1007. /**
  1008. * @brief Receive an amount of data in no-blocking mode with DMA
  1009. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1010. * the configuration information for SPI module.
  1011. * @param pData: pointer to data buffer
  1012. * @note When the CRC feature is enabled the pData Length must be Size + 1.
  1013. * @param Size: amount of data to be sent
  1014. * @retval HAL status
  1015. */
  1016. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1017. {
  1018. if(hspi->State == HAL_SPI_STATE_READY)
  1019. {
  1020. if((pData == NULL) || (Size == 0))
  1021. {
  1022. return HAL_ERROR;
  1023. }
  1024. /* Process Locked */
  1025. __HAL_LOCK(hspi);
  1026. /* Configure communication */
  1027. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1028. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1029. hspi->pRxBuffPtr = pData;
  1030. hspi->RxXferSize = Size;
  1031. hspi->RxXferCount = Size;
  1032. /*Init field not used in handle to zero */
  1033. hspi->RxISR = 0;
  1034. hspi->TxISR = 0;
  1035. hspi->pTxBuffPtr = NULL;
  1036. hspi->TxXferSize = 0;
  1037. hspi->TxXferCount = 0;
  1038. /* Configure communication direction : 1Line */
  1039. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1040. {
  1041. SPI_1LINE_RX(hspi);
  1042. }
  1043. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1044. {
  1045. /* Process Unlocked */
  1046. __HAL_UNLOCK(hspi);
  1047. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1048. return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1049. }
  1050. /* Reset CRC Calculation */
  1051. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1052. {
  1053. SPI_RESET_CRC(hspi);
  1054. }
  1055. /* Set the SPI RxDMA Half transfer complete callback */
  1056. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1057. /* Set the SPI Rx DMA transfer complete callback */
  1058. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1059. /* Set the DMA error callback */
  1060. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1061. /* Enable the Rx DMA Channel */
  1062. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1063. /* Enable Rx DMA Request */
  1064. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1065. /* Process Unlocked */
  1066. __HAL_UNLOCK(hspi);
  1067. /* Check if the SPI is already enabled */
  1068. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1069. {
  1070. /* Enable SPI peripheral */
  1071. __HAL_SPI_ENABLE(hspi);
  1072. }
  1073. return HAL_OK;
  1074. }
  1075. else
  1076. {
  1077. return HAL_BUSY;
  1078. }
  1079. }
  1080. /**
  1081. * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
  1082. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1083. * the configuration information for SPI module.
  1084. * @param pTxData: pointer to transmission data buffer
  1085. * @param pRxData: pointer to reception data buffer
  1086. * @note When the CRC feature is enabled the pRxData Length must be Size + 1
  1087. * @param Size: amount of data to be sent
  1088. * @retval HAL status
  1089. */
  1090. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1091. {
  1092. if((hspi->State == HAL_SPI_STATE_READY) || \
  1093. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1094. {
  1095. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1096. {
  1097. return HAL_ERROR;
  1098. }
  1099. /* Check the parameters */
  1100. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1101. /* Process locked */
  1102. __HAL_LOCK(hspi);
  1103. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1104. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1105. {
  1106. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1107. }
  1108. /* Configure communication */
  1109. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1110. hspi->pTxBuffPtr = (uint8_t*)pTxData;
  1111. hspi->TxXferSize = Size;
  1112. hspi->TxXferCount = Size;
  1113. hspi->pRxBuffPtr = (uint8_t*)pRxData;
  1114. hspi->RxXferSize = Size;
  1115. hspi->RxXferCount = Size;
  1116. /*Init field not used in handle to zero */
  1117. hspi->RxISR = 0;
  1118. hspi->TxISR = 0;
  1119. /* Reset CRC Calculation */
  1120. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1121. {
  1122. SPI_RESET_CRC(hspi);
  1123. }
  1124. /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1125. if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1126. {
  1127. /* Set the SPI Rx DMA Half transfer complete callback */
  1128. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1129. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1130. }
  1131. else
  1132. {
  1133. /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1134. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1135. hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1136. }
  1137. /* Set the DMA error callback */
  1138. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1139. /* Enable the Rx DMA Channel */
  1140. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1141. /* Enable Rx DMA Request */
  1142. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1143. /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1144. is performed in DMA reception complete callback */
  1145. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1146. {
  1147. /* Set the DMA error callback */
  1148. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1149. }
  1150. else
  1151. {
  1152. hspi->hdmatx->XferErrorCallback = NULL;
  1153. }
  1154. /* Enable the Tx DMA Channel */
  1155. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1156. /* Check if the SPI is already enabled */
  1157. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1158. {
  1159. /* Enable SPI peripheral */
  1160. __HAL_SPI_ENABLE(hspi);
  1161. }
  1162. /* Enable Tx DMA Request */
  1163. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1164. /* Process Unlocked */
  1165. __HAL_UNLOCK(hspi);
  1166. return HAL_OK;
  1167. }
  1168. else
  1169. {
  1170. return HAL_BUSY;
  1171. }
  1172. }
  1173. /**
  1174. * @brief Pauses the DMA Transfer.
  1175. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1176. * the configuration information for the specified SPI module.
  1177. * @retval HAL status
  1178. */
  1179. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1180. {
  1181. /* Process Locked */
  1182. __HAL_LOCK(hspi);
  1183. /* Disable the SPI DMA Tx & Rx requests */
  1184. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1185. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1186. /* Process Unlocked */
  1187. __HAL_UNLOCK(hspi);
  1188. return HAL_OK;
  1189. }
  1190. /**
  1191. * @brief Resumes the DMA Transfer.
  1192. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1193. * the configuration information for the specified SPI module.
  1194. * @retval HAL status
  1195. */
  1196. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1197. {
  1198. /* Process Locked */
  1199. __HAL_LOCK(hspi);
  1200. /* Enable the SPI DMA Tx & Rx requests */
  1201. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1202. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1203. /* Process Unlocked */
  1204. __HAL_UNLOCK(hspi);
  1205. return HAL_OK;
  1206. }
  1207. /**
  1208. * @brief Stops the DMA Transfer.
  1209. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1210. * the configuration information for the specified UART module.
  1211. * @retval HAL status
  1212. */
  1213. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1214. {
  1215. /* The Lock is not implemented on this API to allow the user application
  1216. to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1217. when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1218. and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1219. */
  1220. /* Abort the SPI DMA tx Channel */
  1221. if(hspi->hdmatx != NULL)
  1222. {
  1223. HAL_DMA_Abort(hspi->hdmatx);
  1224. }
  1225. /* Abort the SPI DMA rx Channel */
  1226. if(hspi->hdmarx != NULL)
  1227. {
  1228. HAL_DMA_Abort(hspi->hdmarx);
  1229. }
  1230. /* Disable the SPI DMA Tx & Rx requests */
  1231. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1232. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1233. hspi->State = HAL_SPI_STATE_READY;
  1234. return HAL_OK;
  1235. }
  1236. /**
  1237. * @brief This function handles SPI interrupt request.
  1238. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1239. * the configuration information for SPI module.
  1240. * @retval HAL status
  1241. */
  1242. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1243. {
  1244. /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1245. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
  1246. {
  1247. hspi->RxISR(hspi);
  1248. return;
  1249. }
  1250. /* SPI in mode Tramitter ---------------------------------------------------*/
  1251. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
  1252. {
  1253. hspi->TxISR(hspi);
  1254. return;
  1255. }
  1256. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1257. {
  1258. /* SPI CRC error interrupt occurred ---------------------------------------*/
  1259. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1260. {
  1261. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1262. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1263. }
  1264. /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1265. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1266. {
  1267. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1268. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1269. }
  1270. /* SPI Overrun error interrupt occurred -----------------------------------*/
  1271. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1272. {
  1273. if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1274. {
  1275. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1276. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1277. }
  1278. }
  1279. /* SPI Frame error interrupt occurred -------------------------------------*/
  1280. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
  1281. {
  1282. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
  1283. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1284. }
  1285. /* Call the Error call Back in case of Errors */
  1286. if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1287. {
  1288. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1289. hspi->State = HAL_SPI_STATE_READY;
  1290. HAL_SPI_ErrorCallback(hspi);
  1291. }
  1292. }
  1293. }
  1294. /**
  1295. * @brief Tx Transfer completed callbacks
  1296. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1297. * the configuration information for SPI module.
  1298. * @retval None
  1299. */
  1300. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1301. {
  1302. /* NOTE : This function Should not be modified, when the callback is needed,
  1303. the HAL_SPI_TxCpltCallback could be implenetd in the user file
  1304. */
  1305. }
  1306. /**
  1307. * @brief Rx Transfer completed callbacks
  1308. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1309. * the configuration information for SPI module.
  1310. * @retval None
  1311. */
  1312. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1313. {
  1314. /* NOTE : This function Should not be modified, when the callback is needed,
  1315. the HAL_SPI_RxCpltCallback() could be implenetd in the user file
  1316. */
  1317. }
  1318. /**
  1319. * @brief Tx and Rx Transfer completed callbacks
  1320. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1321. * the configuration information for SPI module.
  1322. * @retval None
  1323. */
  1324. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1325. {
  1326. /* NOTE : This function Should not be modified, when the callback is needed,
  1327. the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
  1328. */
  1329. }
  1330. /**
  1331. * @brief Tx Half Transfer completed callbacks
  1332. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1333. * the configuration information for SPI module.
  1334. * @retval None
  1335. */
  1336. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1337. {
  1338. /* NOTE : This function Should not be modified, when the callback is needed,
  1339. the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
  1340. */
  1341. }
  1342. /**
  1343. * @brief Rx Half Transfer completed callbacks
  1344. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1345. * the configuration information for SPI module.
  1346. * @retval None
  1347. */
  1348. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1349. {
  1350. /* NOTE : This function Should not be modified, when the callback is needed,
  1351. the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
  1352. */
  1353. }
  1354. /**
  1355. * @brief Tx and Rx Transfer completed callbacks
  1356. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1357. * the configuration information for SPI module.
  1358. * @retval None
  1359. */
  1360. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1361. {
  1362. /* NOTE : This function Should not be modified, when the callback is needed,
  1363. the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
  1364. */
  1365. }
  1366. /**
  1367. * @brief SPI error callbacks
  1368. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1369. * the configuration information for SPI module.
  1370. * @retval None
  1371. */
  1372. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1373. {
  1374. /* NOTE : - This function Should not be modified, when the callback is needed,
  1375. the HAL_SPI_ErrorCallback() could be implenetd in the user file.
  1376. - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1377. and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1378. */
  1379. }
  1380. /**
  1381. * @}
  1382. */
  1383. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1384. * @brief SPI control functions
  1385. *
  1386. @verbatim
  1387. ===============================================================================
  1388. ##### Peripheral State and Errors functions #####
  1389. ===============================================================================
  1390. [..]
  1391. This subsection provides a set of functions allowing to control the SPI.
  1392. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1393. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1394. @endverbatim
  1395. * @{
  1396. */
  1397. /**
  1398. * @brief Return the SPI state
  1399. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1400. * the configuration information for SPI module.
  1401. * @retval HAL state
  1402. */
  1403. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1404. {
  1405. return hspi->State;
  1406. }
  1407. /**
  1408. * @brief Return the SPI error code
  1409. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1410. * the configuration information for SPI module.
  1411. * @retval SPI Error Code
  1412. */
  1413. HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1414. {
  1415. return hspi->ErrorCode;
  1416. }
  1417. /**
  1418. * @}
  1419. */
  1420. /**
  1421. * @}
  1422. */
  1423. /** @addtogroup SPI_Private_Functions
  1424. * @{
  1425. */
  1426. /**
  1427. * @brief Interrupt Handler to close Tx transfer
  1428. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1429. * the configuration information for SPI module.
  1430. * @retval void
  1431. */
  1432. static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
  1433. {
  1434. /* Wait until TXE flag is set to send data */
  1435. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1436. {
  1437. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1438. }
  1439. /* Disable TXE interrupt */
  1440. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
  1441. /* Disable ERR interrupt if Receive process is finished */
  1442. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1443. {
  1444. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1445. /* Wait until Busy flag is reset before disabling SPI */
  1446. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1447. {
  1448. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1449. }
  1450. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1451. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1452. {
  1453. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1454. }
  1455. /* Check if Errors has been detected during transfer */
  1456. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1457. {
  1458. /* Check if we are in Tx or in Rx/Tx Mode */
  1459. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1460. {
  1461. /* Set state to READY before run the Callback Complete */
  1462. hspi->State = HAL_SPI_STATE_READY;
  1463. HAL_SPI_TxRxCpltCallback(hspi);
  1464. }
  1465. else
  1466. {
  1467. /* Set state to READY before run the Callback Complete */
  1468. hspi->State = HAL_SPI_STATE_READY;
  1469. HAL_SPI_TxCpltCallback(hspi);
  1470. }
  1471. }
  1472. else
  1473. {
  1474. /* Set state to READY before run the Callback Complete */
  1475. hspi->State = HAL_SPI_STATE_READY;
  1476. /* Call Error call back in case of Error */
  1477. HAL_SPI_ErrorCallback(hspi);
  1478. }
  1479. }
  1480. }
  1481. /**
  1482. * @brief Interrupt Handler to transmit amount of data in no-blocking mode
  1483. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1484. * the configuration information for SPI module.
  1485. * @retval void
  1486. */
  1487. static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi)
  1488. {
  1489. /* Transmit data in 8 Bit mode */
  1490. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1491. {
  1492. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1493. }
  1494. /* Transmit data in 16 Bit mode */
  1495. else
  1496. {
  1497. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1498. hspi->pTxBuffPtr+=2;
  1499. }
  1500. hspi->TxXferCount--;
  1501. if(hspi->TxXferCount == 0)
  1502. {
  1503. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1504. {
  1505. /* calculate and transfer CRC on Tx line */
  1506. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1507. }
  1508. SPI_TxCloseIRQHandler(hspi);
  1509. }
  1510. }
  1511. /**
  1512. * @brief Interrupt Handler to close Rx transfer
  1513. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1514. * the configuration information for SPI module.
  1515. * @retval void
  1516. */
  1517. static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
  1518. {
  1519. __IO uint16_t tmpreg = 0;
  1520. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1521. {
  1522. /* Wait until RXNE flag is set to send data */
  1523. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1524. {
  1525. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1526. }
  1527. /* Read CRC to reset RXNE flag */
  1528. tmpreg = hspi->Instance->DR;
  1529. /* Wait until RXNE flag is set to send data */
  1530. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1531. {
  1532. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1533. }
  1534. /* Check if CRC error occurred */
  1535. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1536. {
  1537. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1538. /* Reset CRC Calculation */
  1539. SPI_RESET_CRC(hspi);
  1540. }
  1541. }
  1542. /* Disable RXNE interrupt */
  1543. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1544. /* if Transmit process is finished */
  1545. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1546. {
  1547. /* Disable ERR interrupt */
  1548. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1549. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1550. {
  1551. /* Disable SPI peripheral */
  1552. __HAL_SPI_DISABLE(hspi);
  1553. }
  1554. /* Check if Errors has been detected during transfer */
  1555. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1556. {
  1557. /* Check if we are in Rx or in Rx/Tx Mode */
  1558. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1559. {
  1560. /* Set state to READY before run the Callback Complete */
  1561. hspi->State = HAL_SPI_STATE_READY;
  1562. HAL_SPI_TxRxCpltCallback(hspi);
  1563. }
  1564. else
  1565. {
  1566. /* Set state to READY before run the Callback Complete */
  1567. hspi->State = HAL_SPI_STATE_READY;
  1568. HAL_SPI_RxCpltCallback(hspi);
  1569. }
  1570. }
  1571. else
  1572. {
  1573. /* Set state to READY before run the Callback Complete */
  1574. hspi->State = HAL_SPI_STATE_READY;
  1575. /* Call Error call back in case of Error */
  1576. HAL_SPI_ErrorCallback(hspi);
  1577. }
  1578. }
  1579. }
  1580. /**
  1581. * @brief Interrupt Handler to receive amount of data in 2Lines mode
  1582. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1583. * the configuration information for SPI module.
  1584. * @retval void
  1585. */
  1586. static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi)
  1587. {
  1588. /* Receive data in 8 Bit mode */
  1589. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1590. {
  1591. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1592. }
  1593. /* Receive data in 16 Bit mode */
  1594. else
  1595. {
  1596. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1597. hspi->pRxBuffPtr+=2;
  1598. }
  1599. hspi->RxXferCount--;
  1600. if(hspi->RxXferCount==0)
  1601. {
  1602. SPI_RxCloseIRQHandler(hspi);
  1603. }
  1604. }
  1605. /**
  1606. * @brief Interrupt Handler to receive amount of data in no-blocking mode
  1607. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1608. * the configuration information for SPI module.
  1609. * @retval void
  1610. */
  1611. static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi)
  1612. {
  1613. /* Receive data in 8 Bit mode */
  1614. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1615. {
  1616. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1617. }
  1618. /* Receive data in 16 Bit mode */
  1619. else
  1620. {
  1621. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1622. hspi->pRxBuffPtr+=2;
  1623. }
  1624. hspi->RxXferCount--;
  1625. /* Enable CRC Transmission */
  1626. if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
  1627. {
  1628. /* Set CRC Next to calculate CRC on Rx side */
  1629. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1630. }
  1631. if(hspi->RxXferCount == 0)
  1632. {
  1633. SPI_RxCloseIRQHandler(hspi);
  1634. }
  1635. }
  1636. /**
  1637. * @brief DMA SPI transmit process complete callback
  1638. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1639. * the configuration information for the specified DMA module.
  1640. * @retval None
  1641. */
  1642. static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma)
  1643. {
  1644. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1645. /* DMA Normal Mode */
  1646. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1647. {
  1648. /* Wait until TXE flag is set to send data */
  1649. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1650. {
  1651. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1652. }
  1653. /* Disable Tx DMA Request */
  1654. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1655. /* Wait until Busy flag is reset before disabling SPI */
  1656. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1657. {
  1658. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1659. }
  1660. hspi->TxXferCount = 0;
  1661. hspi->State = HAL_SPI_STATE_READY;
  1662. }
  1663. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1664. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1665. {
  1666. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1667. }
  1668. /* Check if Errors has been detected during transfer */
  1669. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1670. {
  1671. HAL_SPI_ErrorCallback(hspi);
  1672. }
  1673. else
  1674. {
  1675. HAL_SPI_TxCpltCallback(hspi);
  1676. }
  1677. }
  1678. /**
  1679. * @brief DMA SPI receive process complete callback
  1680. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1681. * the configuration information for the specified DMA module.
  1682. * @retval None
  1683. */
  1684. static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1685. {
  1686. __IO uint16_t tmpreg = 0;
  1687. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1688. /* DMA Normal mode */
  1689. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1690. {
  1691. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1692. {
  1693. /* Disable SPI peripheral */
  1694. __HAL_SPI_DISABLE(hspi);
  1695. }
  1696. /* Disable Rx DMA Request */
  1697. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1698. /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
  1699. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1700. /* Reset CRC Calculation */
  1701. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1702. {
  1703. /* Wait until RXNE flag is set to send data */
  1704. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1705. {
  1706. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1707. }
  1708. /* Read CRC */
  1709. tmpreg = hspi->Instance->DR;
  1710. /* Wait until RXNE flag is set */
  1711. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1712. {
  1713. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1714. }
  1715. /* Check if CRC error occurred */
  1716. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1717. {
  1718. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1719. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1720. }
  1721. }
  1722. hspi->RxXferCount = 0;
  1723. hspi->State = HAL_SPI_STATE_READY;
  1724. /* Check if Errors has been detected during transfer */
  1725. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1726. {
  1727. HAL_SPI_ErrorCallback(hspi);
  1728. }
  1729. else
  1730. {
  1731. HAL_SPI_RxCpltCallback(hspi);
  1732. }
  1733. }
  1734. else
  1735. {
  1736. HAL_SPI_RxCpltCallback(hspi);
  1737. }
  1738. }
  1739. /**
  1740. * @brief DMA SPI transmit receive process complete callback
  1741. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1742. * the configuration information for the specified DMA module.
  1743. * @retval None
  1744. */
  1745. static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1746. {
  1747. __IO uint16_t tmpreg = 0;
  1748. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1749. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1750. {
  1751. /* Reset CRC Calculation */
  1752. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1753. {
  1754. /* Check if CRC is done on going (RXNE flag set) */
  1755. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  1756. {
  1757. /* Wait until RXNE flag is set to send data */
  1758. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1759. {
  1760. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1761. }
  1762. }
  1763. /* Read CRC */
  1764. tmpreg = hspi->Instance->DR;
  1765. /* Check if CRC error occurred */
  1766. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1767. {
  1768. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1769. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1770. }
  1771. }
  1772. /* Wait until TXE flag is set to send data */
  1773. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1774. {
  1775. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1776. }
  1777. /* Disable Tx DMA Request */
  1778. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1779. /* Wait until Busy flag is reset before disabling SPI */
  1780. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1781. {
  1782. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1783. }
  1784. /* Disable Rx DMA Request */
  1785. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1786. hspi->TxXferCount = 0;
  1787. hspi->RxXferCount = 0;
  1788. hspi->State = HAL_SPI_STATE_READY;
  1789. /* Check if Errors has been detected during transfer */
  1790. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1791. {
  1792. HAL_SPI_ErrorCallback(hspi);
  1793. }
  1794. else
  1795. {
  1796. HAL_SPI_TxRxCpltCallback(hspi);
  1797. }
  1798. }
  1799. else
  1800. {
  1801. HAL_SPI_TxRxCpltCallback(hspi);
  1802. }
  1803. }
  1804. /**
  1805. * @brief DMA SPI half transmit process complete callback
  1806. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1807. * the configuration information for the specified DMA module.
  1808. * @retval None
  1809. */
  1810. static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma)
  1811. {
  1812. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1813. HAL_SPI_TxHalfCpltCallback(hspi);
  1814. }
  1815. /**
  1816. * @brief DMA SPI half receive process complete callback
  1817. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1818. * the configuration information for the specified DMA module.
  1819. * @retval None
  1820. */
  1821. static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1822. {
  1823. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1824. HAL_SPI_RxHalfCpltCallback(hspi);
  1825. }
  1826. /**
  1827. * @brief DMA SPI Half transmit receive process complete callback
  1828. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1829. * the configuration information for the specified DMA module.
  1830. * @retval None
  1831. */
  1832. static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1833. {
  1834. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1835. HAL_SPI_TxRxHalfCpltCallback(hspi);
  1836. }
  1837. /**
  1838. * @brief DMA SPI communication error callback
  1839. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1840. * the configuration information for the specified DMA module.
  1841. * @retval None
  1842. */
  1843. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  1844. {
  1845. SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1846. hspi->TxXferCount = 0;
  1847. hspi->RxXferCount = 0;
  1848. hspi->State= HAL_SPI_STATE_READY;
  1849. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1850. HAL_SPI_ErrorCallback(hspi);
  1851. }
  1852. /**
  1853. * @brief This function handles SPI Communication Timeout.
  1854. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1855. * the configuration information for SPI module.
  1856. * @param Flag: SPI flag to check
  1857. * @param Status: Flag status to check: RESET or set
  1858. * @param Timeout: Timeout duration
  1859. * @retval HAL status
  1860. */
  1861. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1862. {
  1863. uint32_t tickstart = 0;
  1864. /* Get tick */
  1865. tickstart = HAL_GetTick();
  1866. /* Wait until flag is set */
  1867. if(Status == RESET)
  1868. {
  1869. while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  1870. {
  1871. if(Timeout != HAL_MAX_DELAY)
  1872. {
  1873. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  1874. {
  1875. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1876. on both master and slave sides in order to resynchronize the master
  1877. and slave for their respective CRC calculation */
  1878. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1879. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1880. /* Disable SPI peripheral */
  1881. __HAL_SPI_DISABLE(hspi);
  1882. /* Reset CRC Calculation */
  1883. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1884. {
  1885. SPI_RESET_CRC(hspi);
  1886. }
  1887. hspi->State= HAL_SPI_STATE_READY;
  1888. /* Process Unlocked */
  1889. __HAL_UNLOCK(hspi);
  1890. return HAL_TIMEOUT;
  1891. }
  1892. }
  1893. }
  1894. }
  1895. else
  1896. {
  1897. while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  1898. {
  1899. if(Timeout != HAL_MAX_DELAY)
  1900. {
  1901. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  1902. {
  1903. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1904. on both master and slave sides in order to resynchronize the master
  1905. and slave for their respective CRC calculation */
  1906. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1907. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1908. /* Disable SPI peripheral */
  1909. __HAL_SPI_DISABLE(hspi);
  1910. /* Reset CRC Calculation */
  1911. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
  1912. {
  1913. SPI_RESET_CRC(hspi);
  1914. }
  1915. hspi->State= HAL_SPI_STATE_READY;
  1916. /* Process Unlocked */
  1917. __HAL_UNLOCK(hspi);
  1918. return HAL_TIMEOUT;
  1919. }
  1920. }
  1921. }
  1922. }
  1923. return HAL_OK;
  1924. }
  1925. /**
  1926. * @}
  1927. */
  1928. #endif /* HAL_SPI_MODULE_ENABLED */
  1929. /**
  1930. * @}
  1931. */
  1932. /**
  1933. * @}
  1934. */
  1935. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/