stm32l1xx_hal_i2c.c 100 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 5-September-2014
  7. * @brief I2C HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The I2C HAL driver can be used as follows:
  21. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  22. I2C_HandleTypeDef hi2c;
  23. (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
  24. (##) Enable the I2Cx interface clock
  25. (##) I2C pins configuration
  26. (+++) Enable the clock for the I2C GPIOs
  27. (+++) Configure I2C pins as alternate function open-drain
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the I2Cx interrupt priority
  30. (+++) Enable the NVIC I2C IRQ Channel
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
  33. (+++) Enable the DMAx interface clock using
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Channel
  36. (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  38. the DMA Tx or Rx Channel
  39. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  40. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  41. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  42. (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
  43. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  44. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  45. *** Polling mode IO operation ***
  46. =================================
  47. [..]
  48. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  49. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  50. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  51. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  52. *** Polling mode IO MEM operation ***
  53. =====================================
  54. [..]
  55. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  56. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  57. *** Interrupt mode IO operation ***
  58. ===================================
  59. [..]
  60. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  61. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  62. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  63. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  64. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  66. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  67. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  68. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  69. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  70. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  71. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  72. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  73. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  74. *** Interrupt mode IO MEM operation ***
  75. =======================================
  76. [..]
  77. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  78. HAL_I2C_Mem_Write_IT()
  79. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  80. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  81. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  82. HAL_I2C_Mem_Read_IT()
  83. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  84. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  85. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  86. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  87. *** DMA mode IO operation ***
  88. ==============================
  89. [..]
  90. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  91. HAL_I2C_Master_Transmit_DMA()
  92. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  93. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  94. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  95. HAL_I2C_Master_Receive_DMA()
  96. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  97. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  98. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  99. HAL_I2C_Slave_Transmit_DMA()
  100. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  101. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  102. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  103. HAL_I2C_Slave_Receive_DMA()
  104. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  105. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  106. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  107. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  108. *** DMA mode IO MEM operation ***
  109. =================================
  110. [..]
  111. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  112. HAL_I2C_Mem_Write_DMA()
  113. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  114. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  115. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  116. HAL_I2C_Mem_Read_DMA()
  117. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  118. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  119. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  120. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  121. *** I2C HAL driver macros list ***
  122. ==================================
  123. [..]
  124. Below the list of most used macros in I2C HAL driver.
  125. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  126. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  127. (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
  128. (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
  129. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  130. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  131. [..]
  132. (@) You can refer to the I2C HAL driver header file for more useful macros
  133. @endverbatim
  134. ******************************************************************************
  135. * @attention
  136. *
  137. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  138. *
  139. * Redistribution and use in source and binary forms, with or without modification,
  140. * are permitted provided that the following conditions are met:
  141. * 1. Redistributions of source code must retain the above copyright notice,
  142. * this list of conditions and the following disclaimer.
  143. * 2. Redistributions in binary form must reproduce the above copyright notice,
  144. * this list of conditions and the following disclaimer in the documentation
  145. * and/or other materials provided with the distribution.
  146. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  147. * may be used to endorse or promote products derived from this software
  148. * without specific prior written permission.
  149. *
  150. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  151. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  152. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  153. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  154. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  155. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  156. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  157. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  158. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  159. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  160. *
  161. ******************************************************************************
  162. */
  163. /* Includes ------------------------------------------------------------------*/
  164. #include "stm32l1xx_hal.h"
  165. /** @addtogroup STM32L1xx_HAL_Driver
  166. * @{
  167. */
  168. /** @defgroup I2C I2C
  169. * @brief I2C HAL module driver
  170. * @{
  171. */
  172. #ifdef HAL_I2C_MODULE_ENABLED
  173. /* Private typedef -----------------------------------------------------------*/
  174. /* Private define ------------------------------------------------------------*/
  175. /** @defgroup I2C_Private_Constants I2C Private Constants
  176. * @{
  177. */
  178. #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
  179. #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
  180. #define I2C_MIN_PCLK_FREQ ((uint32_t)2000000) /* 2 MHz*/
  181. /**
  182. * @}
  183. */
  184. /* Private macro -------------------------------------------------------------*/
  185. /* Private variables ---------------------------------------------------------*/
  186. /* Private function prototypes -----------------------------------------------*/
  187. /** @defgroup I2C_Private_Functions I2C Private Functions
  188. * @{
  189. */
  190. static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
  191. static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
  192. static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
  193. static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
  194. static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
  195. static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
  196. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  197. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
  198. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
  199. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
  200. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
  201. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  202. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
  203. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  204. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  205. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  206. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  207. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  208. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  209. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  210. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  211. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  212. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  213. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  214. /**
  215. * @}
  216. */
  217. /* Exported functions ---------------------------------------------------------*/
  218. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  219. * @{
  220. */
  221. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  222. * @brief Initialization and Configuration functions
  223. *
  224. @verbatim
  225. ===============================================================================
  226. ##### Initialization and de-initialization functions #####
  227. ===============================================================================
  228. [..] This subsection provides a set of functions allowing to initialize and
  229. de-initialiaze the I2Cx peripheral:
  230. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  231. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  232. (+) Call the function HAL_I2C_Init() to configure the selected device with
  233. the selected configuration:
  234. (++) Communication Speed
  235. (++) Duty cycle
  236. (++) Addressing mode
  237. (++) Own Address 1
  238. (++) Dual Addressing mode
  239. (++) Own Address 2
  240. (++) General call mode
  241. (++) Nostretch mode
  242. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  243. of the selected I2Cx periperal.
  244. @endverbatim
  245. * @{
  246. */
  247. /**
  248. * @brief Initializes the I2C according to the specified parameters
  249. * in the I2C_InitTypeDef and create the associated handle.
  250. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  251. * the configuration information for I2C module
  252. * @retval HAL status
  253. */
  254. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  255. {
  256. uint32_t freqrange = 0;
  257. uint32_t pclk1 = 0;
  258. /* Check the I2C handle allocation */
  259. if(hi2c == NULL)
  260. {
  261. return HAL_ERROR;
  262. }
  263. /* Check the parameters */
  264. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  265. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  266. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  267. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  268. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  269. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  270. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  271. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  272. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  273. if(hi2c->State == HAL_I2C_STATE_RESET)
  274. {
  275. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  276. HAL_I2C_MspInit(hi2c);
  277. }
  278. /* Get PCLK1 frequency */
  279. pclk1 = HAL_RCC_GetPCLK1Freq();
  280. /* The minimum allowed frequency is 2 MHz */
  281. if(pclk1 < I2C_MIN_PCLK_FREQ)
  282. {
  283. return HAL_ERROR;
  284. }
  285. hi2c->State = HAL_I2C_STATE_BUSY;
  286. /* Disble the selected I2C peripheral */
  287. __HAL_I2C_DISABLE(hi2c);
  288. /* Calculate frequency range */
  289. freqrange = I2C_FREQRANGE(pclk1);
  290. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  291. /* Configure I2Cx: Frequency range */
  292. MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
  293. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  294. /* Configure I2Cx: Rise Time */
  295. MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
  296. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  297. /* Configure I2Cx: Speed */
  298. MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
  299. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  300. /* Configure I2Cx: Generalcall and NoStretch mode */
  301. MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
  302. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  303. /* Configure I2Cx: Own Address1 and addressing mode */
  304. MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
  305. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  306. /* Configure I2Cx: Dual mode and Own Address2 */
  307. MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
  308. /* Enable the selected I2C peripheral */
  309. __HAL_I2C_ENABLE(hi2c);
  310. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  311. hi2c->State = HAL_I2C_STATE_READY;
  312. return HAL_OK;
  313. }
  314. /**
  315. * @brief DeInitializes the I2C peripheral.
  316. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  317. * the configuration information for I2C module
  318. * @retval HAL status
  319. */
  320. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  321. {
  322. /* Check the I2C handle allocation */
  323. if(hi2c == NULL)
  324. {
  325. return HAL_ERROR;
  326. }
  327. /* Check the parameters */
  328. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  329. hi2c->State = HAL_I2C_STATE_BUSY;
  330. /* Disable the I2C Peripheral Clock */
  331. __HAL_I2C_DISABLE(hi2c);
  332. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  333. HAL_I2C_MspDeInit(hi2c);
  334. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  335. hi2c->State = HAL_I2C_STATE_RESET;
  336. /* Release Lock */
  337. __HAL_UNLOCK(hi2c);
  338. return HAL_OK;
  339. }
  340. /**
  341. * @brief I2C MSP Init.
  342. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  343. * the configuration information for I2C module
  344. * @retval None
  345. */
  346. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  347. {
  348. /* NOTE : This function Should not be modified, when the callback is needed,
  349. the HAL_I2C_MspInit could be implemented in the user file
  350. */
  351. }
  352. /**
  353. * @brief I2C MSP DeInit
  354. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  355. * the configuration information for I2C module
  356. * @retval None
  357. */
  358. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  359. {
  360. /* NOTE : This function Should not be modified, when the callback is needed,
  361. the HAL_I2C_MspDeInit could be implemented in the user file
  362. */
  363. }
  364. /**
  365. * @}
  366. */
  367. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  368. * @brief Data transfers functions
  369. *
  370. @verbatim
  371. ===============================================================================
  372. ##### IO operation functions #####
  373. ===============================================================================
  374. [..]
  375. This subsection provides a set of functions allowing to manage the I2C data
  376. transfers.
  377. (#) There are two modes of transfer:
  378. (++) Blocking mode : The communication is performed in the polling mode.
  379. The status of all data processing is returned by the same function
  380. after finishing transfer.
  381. (++) No-Blocking mode : The communication is performed using Interrupts
  382. or DMA. These functions return the status of the transfer startup.
  383. The end of the data processing will be indicated through the
  384. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  385. using DMA mode.
  386. (#) Blocking mode functions are :
  387. (++) HAL_I2C_Master_Transmit()
  388. (++) HAL_I2C_Master_Receive()
  389. (++) HAL_I2C_Slave_Transmit()
  390. (++) HAL_I2C_Slave_Receive()
  391. (++) HAL_I2C_Mem_Write()
  392. (++) HAL_I2C_Mem_Read()
  393. (++) HAL_I2C_IsDeviceReady()
  394. (#) No-Blocking mode functions with Interrupt are :
  395. (++) HAL_I2C_Master_Transmit_IT()
  396. (++) HAL_I2C_Master_Receive_IT()
  397. (++) HAL_I2C_Slave_Transmit_IT()
  398. (++) HAL_I2C_Slave_Receive_IT()
  399. (++) HAL_I2C_Mem_Write_IT()
  400. (++) HAL_I2C_Mem_Read_IT()
  401. (#) No-Blocking mode functions with DMA are :
  402. (++) HAL_I2C_Master_Transmit_DMA()
  403. (++) HAL_I2C_Master_Receive_DMA()
  404. (++) HAL_I2C_Slave_Transmit_DMA()
  405. (++) HAL_I2C_Slave_Receive_DMA()
  406. (++) HAL_I2C_Mem_Write_DMA()
  407. (++) HAL_I2C_Mem_Read_DMA()
  408. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  409. (++) HAL_I2C_MemTxCpltCallback()
  410. (++) HAL_I2C_MemRxCpltCallback()
  411. (++) HAL_I2C_MasterTxCpltCallback()
  412. (++) HAL_I2C_MasterRxCpltCallback()
  413. (++) HAL_I2C_SlaveTxCpltCallback()
  414. (++) HAL_I2C_SlaveRxCpltCallback()
  415. (++) HAL_I2C_ErrorCallback()
  416. @endverbatim
  417. * @{
  418. */
  419. /**
  420. * @brief Transmits in master mode an amount of data in blocking mode.
  421. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  422. * the configuration information for I2C module
  423. * @param DevAddress: Target device address
  424. * @param pData: Pointer to data buffer
  425. * @param Size: Amount of data to be sent
  426. * @param Timeout: Timeout duration
  427. * @retval HAL status
  428. */
  429. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  430. {
  431. if(hi2c->State == HAL_I2C_STATE_READY)
  432. {
  433. if((pData == NULL) || (Size == 0))
  434. {
  435. return HAL_ERROR;
  436. }
  437. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  438. {
  439. return HAL_BUSY;
  440. }
  441. /* Process Locked */
  442. __HAL_LOCK(hi2c);
  443. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  444. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  445. /* Send Slave Address */
  446. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
  447. {
  448. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  449. {
  450. return HAL_ERROR;
  451. }
  452. else
  453. {
  454. return HAL_TIMEOUT;
  455. }
  456. }
  457. /* Clear ADDR flag */
  458. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  459. while(Size > 0)
  460. {
  461. /* Wait until TXE flag is set */
  462. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  463. {
  464. return HAL_TIMEOUT;
  465. }
  466. /* Write data to DR */
  467. hi2c->Instance->DR = (*pData++);
  468. Size--;
  469. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
  470. {
  471. /* Write data to DR */
  472. hi2c->Instance->DR = (*pData++);
  473. Size--;
  474. }
  475. }
  476. /* Wait until TXE flag is set */
  477. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  478. {
  479. return HAL_TIMEOUT;
  480. }
  481. /* Generate Stop */
  482. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  483. /* Wait until BUSY flag is reset */
  484. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  485. {
  486. return HAL_TIMEOUT;
  487. }
  488. hi2c->State = HAL_I2C_STATE_READY;
  489. /* Process Unlocked */
  490. __HAL_UNLOCK(hi2c);
  491. return HAL_OK;
  492. }
  493. else
  494. {
  495. return HAL_BUSY;
  496. }
  497. }
  498. /**
  499. * @brief Receives in master mode an amount of data in blocking mode.
  500. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  501. * the configuration information for I2C module
  502. * @param DevAddress: Target device address
  503. * @param pData: Pointer to data buffer
  504. * @param Size: Amount of data to be sent
  505. * @param Timeout: Timeout duration
  506. * @retval HAL status
  507. */
  508. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  509. {
  510. if(hi2c->State == HAL_I2C_STATE_READY)
  511. {
  512. if((pData == NULL) || (Size == 0))
  513. {
  514. return HAL_ERROR;
  515. }
  516. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  517. {
  518. return HAL_BUSY;
  519. }
  520. /* Process Locked */
  521. __HAL_LOCK(hi2c);
  522. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  523. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  524. /* Send Slave Address */
  525. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
  526. {
  527. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  528. {
  529. return HAL_ERROR;
  530. }
  531. else
  532. {
  533. return HAL_TIMEOUT;
  534. }
  535. }
  536. if(Size == 1)
  537. {
  538. /* Disable Acknowledge */
  539. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  540. /* Clear ADDR flag */
  541. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  542. /* Generate Stop */
  543. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  544. }
  545. else if(Size == 2)
  546. {
  547. /* Disable Acknowledge */
  548. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  549. /* Enable Pos */
  550. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  551. /* Clear ADDR flag */
  552. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  553. }
  554. else
  555. {
  556. /* Enable Acknowledge */
  557. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  558. /* Clear ADDR flag */
  559. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  560. }
  561. while(Size > 0)
  562. {
  563. if(Size <= 3)
  564. {
  565. /* One byte */
  566. if(Size == 1)
  567. {
  568. /* Wait until RXNE flag is set */
  569. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  570. {
  571. return HAL_TIMEOUT;
  572. }
  573. /* Read data from DR */
  574. (*pData++) = hi2c->Instance->DR;
  575. Size--;
  576. }
  577. /* Two bytes */
  578. else if(Size == 2)
  579. {
  580. /* Wait until BTF flag is set */
  581. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  582. {
  583. return HAL_TIMEOUT;
  584. }
  585. /* Generate Stop */
  586. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  587. /* Read data from DR */
  588. (*pData++) = hi2c->Instance->DR;
  589. Size--;
  590. /* Read data from DR */
  591. (*pData++) = hi2c->Instance->DR;
  592. Size--;
  593. }
  594. /* 3 Last bytes */
  595. else
  596. {
  597. /* Wait until BTF flag is set */
  598. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  599. {
  600. return HAL_TIMEOUT;
  601. }
  602. /* Disable Acknowledge */
  603. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  604. /* Read data from DR */
  605. (*pData++) = hi2c->Instance->DR;
  606. Size--;
  607. /* Wait until BTF flag is set */
  608. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  609. {
  610. return HAL_TIMEOUT;
  611. }
  612. /* Generate Stop */
  613. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  614. /* Read data from DR */
  615. (*pData++) = hi2c->Instance->DR;
  616. Size--;
  617. /* Read data from DR */
  618. (*pData++) = hi2c->Instance->DR;
  619. Size--;
  620. }
  621. }
  622. else
  623. {
  624. /* Wait until RXNE flag is set */
  625. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  626. {
  627. return HAL_TIMEOUT;
  628. }
  629. /* Read data from DR */
  630. (*pData++) = hi2c->Instance->DR;
  631. Size--;
  632. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  633. {
  634. /* Read data from DR */
  635. (*pData++) = hi2c->Instance->DR;
  636. Size--;
  637. }
  638. }
  639. }
  640. /* Disable Pos */
  641. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  642. /* Wait until BUSY flag is reset */
  643. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  644. {
  645. return HAL_TIMEOUT;
  646. }
  647. hi2c->State = HAL_I2C_STATE_READY;
  648. /* Process Unlocked */
  649. __HAL_UNLOCK(hi2c);
  650. return HAL_OK;
  651. }
  652. else
  653. {
  654. return HAL_BUSY;
  655. }
  656. }
  657. /**
  658. * @brief Transmits in slave mode an amount of data in blocking mode.
  659. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  660. * the configuration information for I2C module
  661. * @param pData: Pointer to data buffer
  662. * @param Size: Amount of data to be sent
  663. * @param Timeout: Timeout duration
  664. * @retval HAL status
  665. */
  666. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  667. {
  668. if(hi2c->State == HAL_I2C_STATE_READY)
  669. {
  670. if((pData == NULL) || (Size == 0))
  671. {
  672. return HAL_ERROR;
  673. }
  674. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  675. {
  676. return HAL_BUSY;
  677. }
  678. /* Process Locked */
  679. __HAL_LOCK(hi2c);
  680. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  681. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  682. /* Enable Address Acknowledge */
  683. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  684. /* Wait until ADDR flag is set */
  685. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
  686. {
  687. return HAL_TIMEOUT;
  688. }
  689. /* Clear ADDR flag */
  690. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  691. /* If 10bit addressing mode is selected */
  692. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  693. {
  694. /* Wait until ADDR flag is set */
  695. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
  696. {
  697. return HAL_TIMEOUT;
  698. }
  699. /* Clear ADDR flag */
  700. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  701. }
  702. while(Size > 0)
  703. {
  704. /* Wait until TXE flag is set */
  705. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  706. {
  707. return HAL_TIMEOUT;
  708. }
  709. /* Write data to DR */
  710. hi2c->Instance->DR = (*pData++);
  711. Size--;
  712. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
  713. {
  714. /* Write data to DR */
  715. hi2c->Instance->DR = (*pData++);
  716. Size--;
  717. }
  718. }
  719. /* Wait until AF flag is set */
  720. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
  721. {
  722. return HAL_TIMEOUT;
  723. }
  724. /* Clear AF flag */
  725. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  726. /* Disable Address Acknowledge */
  727. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  728. /* Wait until BUSY flag is reset */
  729. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  730. {
  731. return HAL_TIMEOUT;
  732. }
  733. hi2c->State = HAL_I2C_STATE_READY;
  734. /* Process Unlocked */
  735. __HAL_UNLOCK(hi2c);
  736. return HAL_OK;
  737. }
  738. else
  739. {
  740. return HAL_BUSY;
  741. }
  742. }
  743. /**
  744. * @brief Receive in slave mode an amount of data in blocking mode
  745. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  746. * the configuration information for I2C module
  747. * @param pData: Pointer to data buffer
  748. * @param Size: Amount of data to be sent
  749. * @param Timeout: Timeout duration
  750. * @retval HAL status
  751. */
  752. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  753. {
  754. if(hi2c->State == HAL_I2C_STATE_READY)
  755. {
  756. if((pData == NULL) || (Size == 0))
  757. {
  758. return HAL_ERROR;
  759. }
  760. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  761. {
  762. return HAL_BUSY;
  763. }
  764. /* Process Locked */
  765. __HAL_LOCK(hi2c);
  766. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  767. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  768. /* Enable Address Acknowledge */
  769. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  770. /* Wait until ADDR flag is set */
  771. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
  772. {
  773. return HAL_TIMEOUT;
  774. }
  775. /* Clear ADDR flag */
  776. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  777. while(Size > 0)
  778. {
  779. /* Wait until RXNE flag is set */
  780. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  781. {
  782. return HAL_TIMEOUT;
  783. }
  784. /* Read data from DR */
  785. (*pData++) = hi2c->Instance->DR;
  786. Size--;
  787. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
  788. {
  789. /* Read data from DR */
  790. (*pData++) = hi2c->Instance->DR;
  791. Size--;
  792. }
  793. }
  794. /* Wait until STOP flag is set */
  795. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
  796. {
  797. return HAL_TIMEOUT;
  798. }
  799. /* Clear STOP flag */
  800. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  801. /* Disable Address Acknowledge */
  802. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  803. /* Wait until BUSY flag is reset */
  804. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  805. {
  806. return HAL_TIMEOUT;
  807. }
  808. hi2c->State = HAL_I2C_STATE_READY;
  809. /* Process Unlocked */
  810. __HAL_UNLOCK(hi2c);
  811. return HAL_OK;
  812. }
  813. else
  814. {
  815. return HAL_BUSY;
  816. }
  817. }
  818. /**
  819. * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
  820. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  821. * the configuration information for I2C module
  822. * @param DevAddress: Target device address
  823. * @param pData: Pointer to data buffer
  824. * @param Size: Amount of data to be sent
  825. * @retval HAL status
  826. */
  827. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  828. {
  829. if(hi2c->State == HAL_I2C_STATE_READY)
  830. {
  831. if((pData == NULL) || (Size == 0))
  832. {
  833. return HAL_ERROR;
  834. }
  835. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  836. {
  837. return HAL_BUSY;
  838. }
  839. /* Process Locked */
  840. __HAL_LOCK(hi2c);
  841. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  842. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  843. hi2c->pBuffPtr = pData;
  844. hi2c->XferSize = Size;
  845. hi2c->XferCount = Size;
  846. /* Send Slave Address */
  847. if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
  848. {
  849. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  850. {
  851. return HAL_ERROR;
  852. }
  853. else
  854. {
  855. return HAL_TIMEOUT;
  856. }
  857. }
  858. /* Clear ADDR flag */
  859. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  860. /* Process Unlocked */
  861. __HAL_UNLOCK(hi2c);
  862. /* Note : The I2C interrupts must be enabled after unlocking current process
  863. to avoid the risk of I2C interrupt handle execution before current
  864. process unlock */
  865. /* Enable EVT, BUF and ERR interrupt */
  866. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  867. return HAL_OK;
  868. }
  869. else
  870. {
  871. return HAL_BUSY;
  872. }
  873. }
  874. /**
  875. * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
  876. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  877. * the configuration information for I2C module
  878. * @param DevAddress: Target device address
  879. * @param pData: Pointer to data buffer
  880. * @param Size: Amount of data to be sent
  881. * @retval HAL status
  882. */
  883. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  884. {
  885. if(hi2c->State == HAL_I2C_STATE_READY)
  886. {
  887. if((pData == NULL) || (Size == 0))
  888. {
  889. return HAL_ERROR;
  890. }
  891. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  892. {
  893. return HAL_BUSY;
  894. }
  895. /* Process Locked */
  896. __HAL_LOCK(hi2c);
  897. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  898. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  899. hi2c->pBuffPtr = pData;
  900. hi2c->XferSize = Size;
  901. hi2c->XferCount = Size;
  902. /* Send Slave Address */
  903. if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
  904. {
  905. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  906. {
  907. return HAL_ERROR;
  908. }
  909. else
  910. {
  911. return HAL_TIMEOUT;
  912. }
  913. }
  914. if(hi2c->XferCount == 1)
  915. {
  916. /* Disable Acknowledge */
  917. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  918. /* Clear ADDR flag */
  919. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  920. /* Generate Stop */
  921. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  922. }
  923. else if(hi2c->XferCount == 2)
  924. {
  925. /* Disable Acknowledge */
  926. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  927. /* Enable Pos */
  928. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  929. /* Clear ADDR flag */
  930. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  931. }
  932. else
  933. {
  934. /* Enable Acknowledge */
  935. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  936. /* Clear ADDR flag */
  937. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  938. }
  939. /* Process Unlocked */
  940. __HAL_UNLOCK(hi2c);
  941. /* Note : The I2C interrupts must be enabled after unlocking current process
  942. to avoid the risk of I2C interrupt handle execution before current
  943. process unlock */
  944. /* Enable EVT, BUF and ERR interrupt */
  945. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  946. return HAL_OK;
  947. }
  948. else
  949. {
  950. return HAL_BUSY;
  951. }
  952. }
  953. /**
  954. * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
  955. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  956. * the configuration information for I2C module
  957. * @param pData: Pointer to data buffer
  958. * @param Size: Amount of data to be sent
  959. * @retval HAL status
  960. */
  961. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  962. {
  963. if(hi2c->State == HAL_I2C_STATE_READY)
  964. {
  965. if((pData == NULL) || (Size == 0))
  966. {
  967. return HAL_ERROR;
  968. }
  969. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  970. {
  971. return HAL_BUSY;
  972. }
  973. /* Process Locked */
  974. __HAL_LOCK(hi2c);
  975. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  976. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  977. hi2c->pBuffPtr = pData;
  978. hi2c->XferSize = Size;
  979. hi2c->XferCount = Size;
  980. /* Enable Address Acknowledge */
  981. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  982. /* Process Unlocked */
  983. __HAL_UNLOCK(hi2c);
  984. /* Note : The I2C interrupts must be enabled after unlocking current process
  985. to avoid the risk of I2C interrupt handle execution before current
  986. process unlock */
  987. /* Enable EVT, BUF and ERR interrupt */
  988. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  989. return HAL_OK;
  990. }
  991. else
  992. {
  993. return HAL_BUSY;
  994. }
  995. }
  996. /**
  997. * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
  998. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  999. * the configuration information for I2C module
  1000. * @param pData: Pointer to data buffer
  1001. * @param Size: Amount of data to be sent
  1002. * @retval HAL status
  1003. */
  1004. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1005. {
  1006. if(hi2c->State == HAL_I2C_STATE_READY)
  1007. {
  1008. if((pData == NULL) || (Size == 0))
  1009. {
  1010. return HAL_ERROR;
  1011. }
  1012. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1013. {
  1014. return HAL_BUSY;
  1015. }
  1016. /* Process Locked */
  1017. __HAL_LOCK(hi2c);
  1018. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1019. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1020. hi2c->pBuffPtr = pData;
  1021. hi2c->XferSize = Size;
  1022. hi2c->XferCount = Size;
  1023. /* Enable Address Acknowledge */
  1024. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1025. /* Process Unlocked */
  1026. __HAL_UNLOCK(hi2c);
  1027. /* Note : The I2C interrupts must be enabled after unlocking current process
  1028. to avoid the risk of I2C interrupt handle execution before current
  1029. process unlock */
  1030. /* Enable EVT, BUF and ERR interrupt */
  1031. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1032. return HAL_OK;
  1033. }
  1034. else
  1035. {
  1036. return HAL_BUSY;
  1037. }
  1038. }
  1039. /**
  1040. * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
  1041. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1042. * the configuration information for I2C module
  1043. * @param DevAddress: Target device address
  1044. * @param pData: Pointer to data buffer
  1045. * @param Size: Amount of data to be sent
  1046. * @retval HAL status
  1047. */
  1048. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1049. {
  1050. if(hi2c->State == HAL_I2C_STATE_READY)
  1051. {
  1052. if((pData == NULL) || (Size == 0))
  1053. {
  1054. return HAL_ERROR;
  1055. }
  1056. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1057. {
  1058. return HAL_BUSY;
  1059. }
  1060. /* Process Locked */
  1061. __HAL_LOCK(hi2c);
  1062. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1063. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1064. hi2c->pBuffPtr = pData;
  1065. hi2c->XferSize = Size;
  1066. hi2c->XferCount = Size;
  1067. /* Set the I2C DMA transfert complete callback */
  1068. hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
  1069. /* Set the DMA error callback */
  1070. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1071. /* Enable the DMA Channel */
  1072. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  1073. /* Send Slave Address */
  1074. if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
  1075. {
  1076. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1077. {
  1078. return HAL_ERROR;
  1079. }
  1080. else
  1081. {
  1082. return HAL_TIMEOUT;
  1083. }
  1084. }
  1085. /* Enable DMA Request */
  1086. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1087. /* Clear ADDR flag */
  1088. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1089. /* Process Unlocked */
  1090. __HAL_UNLOCK(hi2c);
  1091. return HAL_OK;
  1092. }
  1093. else
  1094. {
  1095. return HAL_BUSY;
  1096. }
  1097. }
  1098. /**
  1099. * @brief Receive in master mode an amount of data in no-blocking mode with DMA
  1100. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1101. * the configuration information for I2C module
  1102. * @param DevAddress: Target device address
  1103. * @param pData: Pointer to data buffer
  1104. * @param Size: Amount of data to be sent
  1105. * @retval HAL status
  1106. */
  1107. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1108. {
  1109. if(hi2c->State == HAL_I2C_STATE_READY)
  1110. {
  1111. if((pData == NULL) || (Size == 0))
  1112. {
  1113. return HAL_ERROR;
  1114. }
  1115. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1116. {
  1117. return HAL_BUSY;
  1118. }
  1119. /* Process Locked */
  1120. __HAL_LOCK(hi2c);
  1121. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1122. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1123. hi2c->pBuffPtr = pData;
  1124. hi2c->XferSize = Size;
  1125. hi2c->XferCount = Size;
  1126. /* Set the I2C DMA transfert complete callback */
  1127. hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
  1128. /* Set the DMA error callback */
  1129. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1130. /* Enable the DMA Channel */
  1131. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  1132. /* Send Slave Address */
  1133. if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
  1134. {
  1135. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1136. {
  1137. return HAL_ERROR;
  1138. }
  1139. else
  1140. {
  1141. return HAL_TIMEOUT;
  1142. }
  1143. }
  1144. if(Size == 1)
  1145. {
  1146. /* Disable Acknowledge */
  1147. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1148. }
  1149. else
  1150. {
  1151. /* Enable Last DMA bit */
  1152. SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  1153. }
  1154. /* Enable DMA Request */
  1155. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1156. /* Clear ADDR flag */
  1157. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1158. /* Process Unlocked */
  1159. __HAL_UNLOCK(hi2c);
  1160. return HAL_OK;
  1161. }
  1162. else
  1163. {
  1164. return HAL_BUSY;
  1165. }
  1166. }
  1167. /**
  1168. * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
  1169. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1170. * the configuration information for I2C module
  1171. * @param pData: Pointer to data buffer
  1172. * @param Size: Amount of data to be sent
  1173. * @retval HAL status
  1174. */
  1175. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1176. {
  1177. if(hi2c->State == HAL_I2C_STATE_READY)
  1178. {
  1179. if((pData == NULL) || (Size == 0))
  1180. {
  1181. return HAL_ERROR;
  1182. }
  1183. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1184. {
  1185. return HAL_BUSY;
  1186. }
  1187. /* Process Locked */
  1188. __HAL_LOCK(hi2c);
  1189. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1190. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1191. hi2c->pBuffPtr = pData;
  1192. hi2c->XferSize = Size;
  1193. hi2c->XferCount = Size;
  1194. /* Set the I2C DMA transfert complete callback */
  1195. hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
  1196. /* Set the DMA error callback */
  1197. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1198. /* Enable the DMA Channel */
  1199. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  1200. /* Enable DMA Request */
  1201. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1202. /* Enable Address Acknowledge */
  1203. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1204. /* Wait until ADDR flag is set */
  1205. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
  1206. {
  1207. return HAL_TIMEOUT;
  1208. }
  1209. /* If 7bit addressing mode is selected */
  1210. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  1211. {
  1212. /* Clear ADDR flag */
  1213. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1214. }
  1215. else
  1216. {
  1217. /* Clear ADDR flag */
  1218. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1219. /* Wait until ADDR flag is set */
  1220. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
  1221. {
  1222. return HAL_TIMEOUT;
  1223. }
  1224. /* Clear ADDR flag */
  1225. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1226. }
  1227. /* Process Unlocked */
  1228. __HAL_UNLOCK(hi2c);
  1229. return HAL_OK;
  1230. }
  1231. else
  1232. {
  1233. return HAL_BUSY;
  1234. }
  1235. }
  1236. /**
  1237. * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
  1238. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1239. * the configuration information for I2C module
  1240. * @param pData: Pointer to data buffer
  1241. * @param Size: Amount of data to be sent
  1242. * @retval HAL status
  1243. */
  1244. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1245. {
  1246. if(hi2c->State == HAL_I2C_STATE_READY)
  1247. {
  1248. if((pData == NULL) || (Size == 0))
  1249. {
  1250. return HAL_ERROR;
  1251. }
  1252. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1253. {
  1254. return HAL_BUSY;
  1255. }
  1256. /* Process Locked */
  1257. __HAL_LOCK(hi2c);
  1258. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1259. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1260. hi2c->pBuffPtr = pData;
  1261. hi2c->XferSize = Size;
  1262. hi2c->XferCount = Size;
  1263. /* Set the I2C DMA transfert complete callback */
  1264. hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
  1265. /* Set the DMA error callback */
  1266. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1267. /* Enable the DMA Channel */
  1268. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  1269. /* Enable DMA Request */
  1270. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1271. /* Enable Address Acknowledge */
  1272. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1273. /* Wait until ADDR flag is set */
  1274. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
  1275. {
  1276. return HAL_TIMEOUT;
  1277. }
  1278. /* Clear ADDR flag */
  1279. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1280. /* Process Unlocked */
  1281. __HAL_UNLOCK(hi2c);
  1282. return HAL_OK;
  1283. }
  1284. else
  1285. {
  1286. return HAL_BUSY;
  1287. }
  1288. }
  1289. /**
  1290. * @brief Write an amount of data in blocking mode to a specific memory address
  1291. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1292. * the configuration information for I2C module
  1293. * @param DevAddress: Target device address
  1294. * @param MemAddress: Internal memory address
  1295. * @param MemAddSize: Size of internal memory address
  1296. * @param pData: Pointer to data buffer
  1297. * @param Size: Amount of data to be sent
  1298. * @param Timeout: Timeout duration
  1299. * @retval HAL status
  1300. */
  1301. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1302. {
  1303. /* Check the parameters */
  1304. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1305. if(hi2c->State == HAL_I2C_STATE_READY)
  1306. {
  1307. if((pData == NULL) || (Size == 0))
  1308. {
  1309. return HAL_ERROR;
  1310. }
  1311. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1312. {
  1313. return HAL_BUSY;
  1314. }
  1315. /* Process Locked */
  1316. __HAL_LOCK(hi2c);
  1317. hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
  1318. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1319. /* Send Slave Address and Memory Address */
  1320. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
  1321. {
  1322. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1323. {
  1324. return HAL_ERROR;
  1325. }
  1326. else
  1327. {
  1328. return HAL_TIMEOUT;
  1329. }
  1330. }
  1331. while(Size > 0)
  1332. {
  1333. /* Wait until TXE flag is set */
  1334. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  1335. {
  1336. return HAL_TIMEOUT;
  1337. }
  1338. /* Write data to DR */
  1339. hi2c->Instance->DR = (*pData++);
  1340. Size--;
  1341. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
  1342. {
  1343. /* Write data to DR */
  1344. hi2c->Instance->DR = (*pData++);
  1345. Size--;
  1346. }
  1347. }
  1348. /* Wait until TXE flag is set */
  1349. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  1350. {
  1351. return HAL_TIMEOUT;
  1352. }
  1353. /* Generate Stop */
  1354. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1355. /* Wait until BUSY flag is reset */
  1356. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  1357. {
  1358. return HAL_TIMEOUT;
  1359. }
  1360. hi2c->State = HAL_I2C_STATE_READY;
  1361. /* Process Unlocked */
  1362. __HAL_UNLOCK(hi2c);
  1363. return HAL_OK;
  1364. }
  1365. else
  1366. {
  1367. return HAL_BUSY;
  1368. }
  1369. }
  1370. /**
  1371. * @brief Read an amount of data in blocking mode from a specific memory address
  1372. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1373. * the configuration information for I2C module
  1374. * @param DevAddress: Target device address
  1375. * @param MemAddress: Internal memory address
  1376. * @param MemAddSize: Size of internal memory address
  1377. * @param pData: Pointer to data buffer
  1378. * @param Size: Amount of data to be sent
  1379. * @param Timeout: Timeout duration
  1380. * @retval HAL status
  1381. */
  1382. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1383. {
  1384. /* Check the parameters */
  1385. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1386. if(hi2c->State == HAL_I2C_STATE_READY)
  1387. {
  1388. if((pData == NULL) || (Size == 0))
  1389. {
  1390. return HAL_ERROR;
  1391. }
  1392. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1393. {
  1394. return HAL_BUSY;
  1395. }
  1396. /* Process Locked */
  1397. __HAL_LOCK(hi2c);
  1398. hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
  1399. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1400. /* Send Slave Address and Memory Address */
  1401. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
  1402. {
  1403. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1404. {
  1405. return HAL_ERROR;
  1406. }
  1407. else
  1408. {
  1409. return HAL_TIMEOUT;
  1410. }
  1411. }
  1412. if(Size == 1)
  1413. {
  1414. /* Disable Acknowledge */
  1415. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1416. /* Clear ADDR flag */
  1417. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1418. /* Generate Stop */
  1419. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1420. }
  1421. else if(Size == 2)
  1422. {
  1423. /* Disable Acknowledge */
  1424. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1425. /* Enable Pos */
  1426. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1427. /* Clear ADDR flag */
  1428. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1429. }
  1430. else
  1431. {
  1432. /* Clear ADDR flag */
  1433. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1434. }
  1435. while(Size > 0)
  1436. {
  1437. if(Size <= 3)
  1438. {
  1439. /* One byte */
  1440. if(Size== 1)
  1441. {
  1442. /* Wait until RXNE flag is set */
  1443. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  1444. {
  1445. return HAL_TIMEOUT;
  1446. }
  1447. /* Read data from DR */
  1448. (*pData++) = hi2c->Instance->DR;
  1449. Size--;
  1450. }
  1451. /* Two bytes */
  1452. else if(Size == 2)
  1453. {
  1454. /* Wait until BTF flag is set */
  1455. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  1456. {
  1457. return HAL_TIMEOUT;
  1458. }
  1459. /* Generate Stop */
  1460. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1461. /* Read data from DR */
  1462. (*pData++) = hi2c->Instance->DR;
  1463. Size--;
  1464. /* Read data from DR */
  1465. (*pData++) = hi2c->Instance->DR;
  1466. Size--;
  1467. }
  1468. /* 3 Last bytes */
  1469. else
  1470. {
  1471. /* Wait until BTF flag is set */
  1472. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  1473. {
  1474. return HAL_TIMEOUT;
  1475. }
  1476. /* Disable Acknowledge */
  1477. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1478. /* Read data from DR */
  1479. (*pData++) = hi2c->Instance->DR;
  1480. Size--;
  1481. /* Wait until BTF flag is set */
  1482. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
  1483. {
  1484. return HAL_TIMEOUT;
  1485. }
  1486. /* Generate Stop */
  1487. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1488. /* Read data from DR */
  1489. (*pData++) = hi2c->Instance->DR;
  1490. Size--;
  1491. /* Read data from DR */
  1492. (*pData++) = hi2c->Instance->DR;
  1493. Size--;
  1494. }
  1495. }
  1496. else
  1497. {
  1498. /* Wait until RXNE flag is set */
  1499. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  1500. {
  1501. return HAL_TIMEOUT;
  1502. }
  1503. /* Read data from DR */
  1504. (*pData++) = hi2c->Instance->DR;
  1505. Size--;
  1506. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  1507. {
  1508. /* Read data from DR */
  1509. (*pData++) = hi2c->Instance->DR;
  1510. Size--;
  1511. }
  1512. }
  1513. }
  1514. /* Disable Pos */
  1515. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1516. /* Wait until BUSY flag is reset */
  1517. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  1518. {
  1519. return HAL_TIMEOUT;
  1520. }
  1521. hi2c->State = HAL_I2C_STATE_READY;
  1522. /* Process Unlocked */
  1523. __HAL_UNLOCK(hi2c);
  1524. return HAL_OK;
  1525. }
  1526. else
  1527. {
  1528. return HAL_BUSY;
  1529. }
  1530. }
  1531. /**
  1532. * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
  1533. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1534. * the configuration information for I2C module
  1535. * @param DevAddress: Target device address
  1536. * @param MemAddress: Internal memory address
  1537. * @param MemAddSize: Size of internal memory address
  1538. * @param pData: Pointer to data buffer
  1539. * @param Size: Amount of data to be sent
  1540. * @retval HAL status
  1541. */
  1542. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1543. {
  1544. /* Check the parameters */
  1545. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1546. if(hi2c->State == HAL_I2C_STATE_READY)
  1547. {
  1548. if((pData == NULL) || (Size == 0))
  1549. {
  1550. return HAL_ERROR;
  1551. }
  1552. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1553. {
  1554. return HAL_BUSY;
  1555. }
  1556. /* Process Locked */
  1557. __HAL_LOCK(hi2c);
  1558. hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
  1559. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1560. hi2c->pBuffPtr = pData;
  1561. hi2c->XferSize = Size;
  1562. hi2c->XferCount = Size;
  1563. /* Send Slave Address and Memory Address */
  1564. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
  1565. {
  1566. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1567. {
  1568. return HAL_ERROR;
  1569. }
  1570. else
  1571. {
  1572. return HAL_TIMEOUT;
  1573. }
  1574. }
  1575. /* Process Unlocked */
  1576. __HAL_UNLOCK(hi2c);
  1577. /* Note : The I2C interrupts must be enabled after unlocking current process
  1578. to avoid the risk of I2C interrupt handle execution before current
  1579. process unlock */
  1580. /* Enable EVT, BUF and ERR interrupt */
  1581. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1582. return HAL_OK;
  1583. }
  1584. else
  1585. {
  1586. return HAL_BUSY;
  1587. }
  1588. }
  1589. /**
  1590. * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
  1591. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1592. * the configuration information for I2C module
  1593. * @param DevAddress: Target device address
  1594. * @param MemAddress: Internal memory address
  1595. * @param MemAddSize: Size of internal memory address
  1596. * @param pData: Pointer to data buffer
  1597. * @param Size: Amount of data to be sent
  1598. * @retval HAL status
  1599. */
  1600. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1601. {
  1602. /* Check the parameters */
  1603. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1604. if(hi2c->State == HAL_I2C_STATE_READY)
  1605. {
  1606. if((pData == NULL) || (Size == 0))
  1607. {
  1608. return HAL_ERROR;
  1609. }
  1610. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1611. {
  1612. return HAL_BUSY;
  1613. }
  1614. /* Process Locked */
  1615. __HAL_LOCK(hi2c);
  1616. hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
  1617. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1618. hi2c->pBuffPtr = pData;
  1619. hi2c->XferSize = Size;
  1620. hi2c->XferCount = Size;
  1621. /* Send Slave Address and Memory Address */
  1622. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
  1623. {
  1624. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1625. {
  1626. return HAL_ERROR;
  1627. }
  1628. else
  1629. {
  1630. return HAL_TIMEOUT;
  1631. }
  1632. }
  1633. if(hi2c->XferCount == 1)
  1634. {
  1635. /* Disable Acknowledge */
  1636. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1637. /* Clear ADDR flag */
  1638. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1639. /* Generate Stop */
  1640. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1641. }
  1642. else if(hi2c->XferCount == 2)
  1643. {
  1644. /* Disable Acknowledge */
  1645. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1646. /* Enable Pos */
  1647. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1648. /* Clear ADDR flag */
  1649. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1650. }
  1651. else
  1652. {
  1653. /* Enable Acknowledge */
  1654. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1655. /* Clear ADDR flag */
  1656. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1657. }
  1658. /* Process Unlocked */
  1659. __HAL_UNLOCK(hi2c);
  1660. /* Note : The I2C interrupts must be enabled after unlocking current process
  1661. to avoid the risk of I2C interrupt handle execution before current
  1662. process unlock */
  1663. /* Enable EVT, BUF and ERR interrupt */
  1664. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1665. return HAL_OK;
  1666. }
  1667. else
  1668. {
  1669. return HAL_BUSY;
  1670. }
  1671. }
  1672. /**
  1673. * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
  1674. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1675. * the configuration information for I2C module
  1676. * @param DevAddress: Target device address
  1677. * @param MemAddress: Internal memory address
  1678. * @param MemAddSize: Size of internal memory address
  1679. * @param pData: Pointer to data buffer
  1680. * @param Size: Amount of data to be sent
  1681. * @retval HAL status
  1682. */
  1683. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1684. {
  1685. /* Check the parameters */
  1686. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1687. if(hi2c->State == HAL_I2C_STATE_READY)
  1688. {
  1689. if((pData == NULL) || (Size == 0))
  1690. {
  1691. return HAL_ERROR;
  1692. }
  1693. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1694. {
  1695. return HAL_BUSY;
  1696. }
  1697. /* Process Locked */
  1698. __HAL_LOCK(hi2c);
  1699. hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
  1700. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1701. hi2c->pBuffPtr = pData;
  1702. hi2c->XferSize = Size;
  1703. hi2c->XferCount = Size;
  1704. /* Set the I2C DMA transfert complete callback */
  1705. hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
  1706. /* Set the DMA error callback */
  1707. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1708. /* Enable the DMA Channel */
  1709. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  1710. /* Send Slave Address and Memory Address */
  1711. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
  1712. {
  1713. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1714. {
  1715. return HAL_ERROR;
  1716. }
  1717. else
  1718. {
  1719. return HAL_TIMEOUT;
  1720. }
  1721. }
  1722. /* Enable DMA Request */
  1723. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1724. /* Process Unlocked */
  1725. __HAL_UNLOCK(hi2c);
  1726. return HAL_OK;
  1727. }
  1728. else
  1729. {
  1730. return HAL_BUSY;
  1731. }
  1732. }
  1733. /**
  1734. * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
  1735. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1736. * the configuration information for I2C module
  1737. * @param DevAddress: Target device address
  1738. * @param MemAddress: Internal memory address
  1739. * @param MemAddSize: Size of internal memory address
  1740. * @param pData: Pointer to data buffer
  1741. * @param Size: Amount of data to be read
  1742. * @retval HAL status
  1743. */
  1744. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1745. {
  1746. /* Check the parameters */
  1747. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1748. if(hi2c->State == HAL_I2C_STATE_READY)
  1749. {
  1750. if((pData == NULL) || (Size == 0))
  1751. {
  1752. return HAL_ERROR;
  1753. }
  1754. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1755. {
  1756. return HAL_BUSY;
  1757. }
  1758. /* Process Locked */
  1759. __HAL_LOCK(hi2c);
  1760. hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
  1761. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1762. hi2c->pBuffPtr = pData;
  1763. hi2c->XferSize = Size;
  1764. hi2c->XferCount = Size;
  1765. /* Set the I2C DMA transfert complete callback */
  1766. hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
  1767. /* Set the DMA error callback */
  1768. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1769. /* Enable the DMA Channel */
  1770. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  1771. /* Send Slave Address and Memory Address */
  1772. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
  1773. {
  1774. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1775. {
  1776. return HAL_ERROR;
  1777. }
  1778. else
  1779. {
  1780. return HAL_TIMEOUT;
  1781. }
  1782. }
  1783. if(Size == 1)
  1784. {
  1785. /* Disable Acknowledge */
  1786. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1787. }
  1788. else
  1789. {
  1790. /* Enable Last DMA bit */
  1791. SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  1792. }
  1793. /* Enable DMA Request */
  1794. SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  1795. /* Clear ADDR flag */
  1796. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1797. /* Process Unlocked */
  1798. __HAL_UNLOCK(hi2c);
  1799. return HAL_OK;
  1800. }
  1801. else
  1802. {
  1803. return HAL_BUSY;
  1804. }
  1805. }
  1806. /**
  1807. * @brief Checks if target device is ready for communication.
  1808. * @note This function is used with Memory devices
  1809. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1810. * the configuration information for I2C module
  1811. * @param DevAddress: Target device address
  1812. * @param Trials: Number of trials
  1813. * @param Timeout: Timeout duration
  1814. * @retval HAL status
  1815. */
  1816. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  1817. {
  1818. uint32_t tickstart = 0, I2C_Trials = 1;
  1819. if(hi2c->State == HAL_I2C_STATE_READY)
  1820. {
  1821. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
  1822. {
  1823. return HAL_BUSY;
  1824. }
  1825. /* Process Locked */
  1826. __HAL_LOCK(hi2c);
  1827. hi2c->State = HAL_I2C_STATE_BUSY;
  1828. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1829. do
  1830. {
  1831. /* Generate Start */
  1832. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1833. /* Wait until SB flag is set */
  1834. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  1835. {
  1836. return HAL_TIMEOUT;
  1837. }
  1838. /* Send slave address */
  1839. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  1840. /* Wait until ADDR or AF flag are set */
  1841. /* Get tick */
  1842. tickstart = HAL_GetTick();
  1843. while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET) && \
  1844. (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && \
  1845. (hi2c->State != HAL_I2C_STATE_TIMEOUT))
  1846. {
  1847. if(Timeout != HAL_MAX_DELAY)
  1848. {
  1849. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1850. {
  1851. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  1852. }
  1853. }
  1854. }
  1855. hi2c->State = HAL_I2C_STATE_READY;
  1856. /* Check if the ADDR flag has been set */
  1857. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  1858. {
  1859. /* Generate Stop */
  1860. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1861. /* Clear ADDR Flag */
  1862. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1863. /* Wait until BUSY flag is reset */
  1864. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  1865. {
  1866. return HAL_TIMEOUT;
  1867. }
  1868. hi2c->State = HAL_I2C_STATE_READY;
  1869. /* Process Unlocked */
  1870. __HAL_UNLOCK(hi2c);
  1871. return HAL_OK;
  1872. }
  1873. else
  1874. {
  1875. /* Generate Stop */
  1876. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  1877. /* Clear AF Flag */
  1878. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1879. /* Wait until BUSY flag is reset */
  1880. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
  1881. {
  1882. return HAL_TIMEOUT;
  1883. }
  1884. }
  1885. }while(I2C_Trials++ < Trials);
  1886. hi2c->State = HAL_I2C_STATE_READY;
  1887. /* Process Unlocked */
  1888. __HAL_UNLOCK(hi2c);
  1889. return HAL_ERROR;
  1890. }
  1891. else
  1892. {
  1893. return HAL_BUSY;
  1894. }
  1895. }
  1896. /**
  1897. * @brief This function handles I2C event interrupt request.
  1898. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1899. * the configuration information for I2C module
  1900. * @retval HAL status
  1901. */
  1902. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  1903. {
  1904. /* Master mode selected */
  1905. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
  1906. {
  1907. /* I2C in mode Transmitter -----------------------------------------------*/
  1908. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
  1909. {
  1910. /* TXE set and BTF reset -----------------------------------------------*/
  1911. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
  1912. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
  1913. (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
  1914. {
  1915. I2C_MasterTransmit_TXE(hi2c);
  1916. }
  1917. /* BTF set -------------------------------------------------------------*/
  1918. else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
  1919. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
  1920. {
  1921. I2C_MasterTransmit_BTF(hi2c);
  1922. }
  1923. }
  1924. /* I2C in mode Receiver --------------------------------------------------*/
  1925. else
  1926. {
  1927. /* RXNE set and BTF reset -----------------------------------------------*/
  1928. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
  1929. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
  1930. (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
  1931. {
  1932. I2C_MasterReceive_RXNE(hi2c);
  1933. }
  1934. /* BTF set -------------------------------------------------------------*/
  1935. else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
  1936. {
  1937. I2C_MasterReceive_BTF(hi2c);
  1938. }
  1939. }
  1940. }
  1941. /* Slave mode selected */
  1942. else
  1943. {
  1944. /* ADDR set --------------------------------------------------------------*/
  1945. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) && \
  1946. (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
  1947. {
  1948. I2C_Slave_ADDR(hi2c);
  1949. }
  1950. /* STOPF set --------------------------------------------------------------*/
  1951. else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && \
  1952. (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
  1953. {
  1954. I2C_Slave_STOPF(hi2c);
  1955. }
  1956. /* I2C in mode Transmitter -----------------------------------------------*/
  1957. else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
  1958. {
  1959. /* TXE set and BTF reset -----------------------------------------------*/
  1960. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
  1961. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
  1962. (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
  1963. {
  1964. I2C_SlaveTransmit_TXE(hi2c);
  1965. }
  1966. /* BTF set -------------------------------------------------------------*/
  1967. else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
  1968. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
  1969. {
  1970. I2C_SlaveTransmit_BTF(hi2c);
  1971. }
  1972. }
  1973. /* I2C in mode Receiver --------------------------------------------------*/
  1974. else
  1975. {
  1976. /* RXNE set and BTF reset ----------------------------------------------*/
  1977. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
  1978. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
  1979. (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
  1980. {
  1981. I2C_SlaveReceive_RXNE(hi2c);
  1982. }
  1983. /* BTF set -------------------------------------------------------------*/
  1984. else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
  1985. {
  1986. I2C_SlaveReceive_BTF(hi2c);
  1987. }
  1988. }
  1989. }
  1990. }
  1991. /**
  1992. * @brief This function handles I2C error interrupt request.
  1993. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  1994. * the configuration information for I2C module
  1995. * @retval HAL status
  1996. */
  1997. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  1998. {
  1999. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2000. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && \
  2001. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
  2002. {
  2003. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2004. /* Clear BERR flag */
  2005. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2006. }
  2007. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2008. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && \
  2009. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
  2010. {
  2011. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2012. /* Clear ARLO flag */
  2013. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2014. }
  2015. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2016. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) && \
  2017. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
  2018. {
  2019. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == RESET) && \
  2020. (hi2c->XferCount == 0) && \
  2021. (hi2c->State == HAL_I2C_STATE_BUSY_TX))
  2022. {
  2023. I2C_Slave_AF(hi2c);
  2024. }
  2025. else
  2026. {
  2027. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2028. /* Clear AF flag */
  2029. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2030. }
  2031. }
  2032. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2033. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && \
  2034. (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
  2035. {
  2036. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  2037. /* Clear OVR flag */
  2038. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2039. }
  2040. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2041. {
  2042. hi2c->State = HAL_I2C_STATE_READY;
  2043. /* Disable EVT, BUF and ERR interrupts */
  2044. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2045. HAL_I2C_ErrorCallback(hi2c);
  2046. }
  2047. }
  2048. /**
  2049. * @brief Master Tx Transfer completed callbacks.
  2050. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2051. * the configuration information for I2C module
  2052. * @retval None
  2053. */
  2054. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2055. {
  2056. /* NOTE : This function should not be modified, when the callback is needed,
  2057. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  2058. */
  2059. }
  2060. /**
  2061. * @brief Master Rx Transfer completed callbacks.
  2062. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2063. * the configuration information for I2C module
  2064. * @retval None
  2065. */
  2066. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2067. {
  2068. /* NOTE : This function should not be modified, when the callback is needed,
  2069. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  2070. */
  2071. }
  2072. /** @brief Slave Tx Transfer completed callbacks.
  2073. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2074. * the configuration information for I2C module
  2075. * @retval None
  2076. */
  2077. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2078. {
  2079. /* NOTE : This function should not be modified, when the callback is needed,
  2080. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  2081. */
  2082. }
  2083. /**
  2084. * @brief Slave Rx Transfer completed callbacks.
  2085. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2086. * the configuration information for I2C module
  2087. * @retval None
  2088. */
  2089. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2090. {
  2091. /* NOTE : This function should not be modified, when the callback is needed,
  2092. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  2093. */
  2094. }
  2095. /**
  2096. * @brief Memory Tx Transfer completed callbacks.
  2097. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2098. * the configuration information for I2C module
  2099. * @retval None
  2100. */
  2101. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2102. {
  2103. /* NOTE : This function should not be modified, when the callback is needed,
  2104. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  2105. */
  2106. }
  2107. /**
  2108. * @brief Memory Rx Transfer completed callbacks.
  2109. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2110. * the configuration information for I2C module
  2111. * @retval None
  2112. */
  2113. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2114. {
  2115. /* NOTE : This function should not be modified, when the callback is needed,
  2116. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  2117. */
  2118. }
  2119. /**
  2120. * @brief I2C error callbacks.
  2121. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2122. * the configuration information for I2C module
  2123. * @retval None
  2124. */
  2125. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  2126. {
  2127. /* NOTE : This function should not be modified, when the callback is needed,
  2128. the HAL_I2C_ErrorCallback can be implemented in the user file
  2129. */
  2130. }
  2131. /**
  2132. * @}
  2133. */
  2134. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
  2135. * @brief Peripheral State and Errors functions
  2136. *
  2137. @verbatim
  2138. ===============================================================================
  2139. ##### Peripheral State and Errors functions #####
  2140. ===============================================================================
  2141. [..]
  2142. This subsection permits to get in run-time the status of the peripheral
  2143. and the data flow.
  2144. @endverbatim
  2145. * @{
  2146. */
  2147. /**
  2148. * @brief Returns the I2C state.
  2149. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2150. * the configuration information for I2C module
  2151. * @retval HAL state
  2152. */
  2153. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  2154. {
  2155. return hi2c->State;
  2156. }
  2157. /**
  2158. * @brief Return the I2C error code
  2159. * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
  2160. * the configuration information for the specified I2C.
  2161. * @retval I2C Error Code
  2162. */
  2163. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  2164. {
  2165. return hi2c->ErrorCode;
  2166. }
  2167. /**
  2168. * @}
  2169. */
  2170. /**
  2171. * @}
  2172. */
  2173. /** @addtogroup I2C_Private_Functions
  2174. * @{
  2175. */
  2176. /**
  2177. * @brief Handle TXE flag for Master
  2178. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2179. * the configuration information for I2C module
  2180. * @retval HAL status
  2181. */
  2182. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  2183. {
  2184. /* Write data to DR */
  2185. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2186. hi2c->XferCount--;
  2187. if(hi2c->XferCount == 0)
  2188. {
  2189. /* Disable BUF interrupt */
  2190. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  2191. }
  2192. return HAL_OK;
  2193. }
  2194. /**
  2195. * @brief Handle BTF flag for Master transmitter
  2196. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2197. * the configuration information for I2C module
  2198. * @retval HAL status
  2199. */
  2200. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  2201. {
  2202. if(hi2c->XferCount != 0)
  2203. {
  2204. /* Write data to DR */
  2205. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2206. hi2c->XferCount--;
  2207. }
  2208. else
  2209. {
  2210. /* Disable EVT, BUF and ERR interrupt */
  2211. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2212. /* Generate Stop */
  2213. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2214. /* Wait until BUSY flag is reset */
  2215. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2216. {
  2217. return HAL_TIMEOUT;
  2218. }
  2219. if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
  2220. {
  2221. hi2c->State = HAL_I2C_STATE_READY;
  2222. HAL_I2C_MemTxCpltCallback(hi2c);
  2223. }
  2224. else
  2225. {
  2226. hi2c->State = HAL_I2C_STATE_READY;
  2227. HAL_I2C_MasterTxCpltCallback(hi2c);
  2228. }
  2229. }
  2230. return HAL_OK;
  2231. }
  2232. /**
  2233. * @brief Handle RXNE flag for Master
  2234. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2235. * the configuration information for I2C module
  2236. * @retval HAL status
  2237. */
  2238. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  2239. {
  2240. uint32_t tmp = 0;
  2241. tmp = hi2c->XferCount;
  2242. if(tmp > 3)
  2243. {
  2244. /* Read data from DR */
  2245. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2246. hi2c->XferCount--;
  2247. }
  2248. else if((tmp == 2) || (tmp == 3))
  2249. {
  2250. /* Disable BUF interrupt */
  2251. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  2252. }
  2253. else
  2254. {
  2255. /* Disable EVT, BUF and ERR interrupt */
  2256. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2257. /* Read data from DR */
  2258. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2259. hi2c->XferCount--;
  2260. /* Wait until BUSY flag is reset */
  2261. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2262. {
  2263. return HAL_TIMEOUT;
  2264. }
  2265. if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
  2266. {
  2267. hi2c->State = HAL_I2C_STATE_READY;
  2268. HAL_I2C_MemRxCpltCallback(hi2c);
  2269. }
  2270. else
  2271. {
  2272. hi2c->State = HAL_I2C_STATE_READY;
  2273. HAL_I2C_MasterRxCpltCallback(hi2c);
  2274. }
  2275. }
  2276. return HAL_OK;
  2277. }
  2278. /**
  2279. * @brief Handle BTF flag for Master receiver
  2280. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2281. * the configuration information for I2C module
  2282. * @retval HAL status
  2283. */
  2284. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  2285. {
  2286. if(hi2c->XferCount == 3)
  2287. {
  2288. /* Disable Acknowledge */
  2289. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2290. /* Read data from DR */
  2291. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2292. hi2c->XferCount--;
  2293. }
  2294. else if(hi2c->XferCount == 2)
  2295. {
  2296. /* Generate Stop */
  2297. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2298. /* Read data from DR */
  2299. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2300. hi2c->XferCount--;
  2301. /* Read data from DR */
  2302. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2303. hi2c->XferCount--;
  2304. /* Disable EVT and ERR interrupt */
  2305. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2306. /* Wait until BUSY flag is reset */
  2307. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2308. {
  2309. return HAL_TIMEOUT;
  2310. }
  2311. if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
  2312. {
  2313. hi2c->State = HAL_I2C_STATE_READY;
  2314. HAL_I2C_MemRxCpltCallback(hi2c);
  2315. }
  2316. else
  2317. {
  2318. hi2c->State = HAL_I2C_STATE_READY;
  2319. HAL_I2C_MasterRxCpltCallback(hi2c);
  2320. }
  2321. }
  2322. else
  2323. {
  2324. /* Read data from DR */
  2325. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2326. hi2c->XferCount--;
  2327. }
  2328. return HAL_OK;
  2329. }
  2330. /**
  2331. * @brief Handle TXE flag for Slave
  2332. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2333. * the configuration information for I2C module
  2334. * @retval HAL status
  2335. */
  2336. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  2337. {
  2338. if(hi2c->XferCount != 0)
  2339. {
  2340. /* Write data to DR */
  2341. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2342. hi2c->XferCount--;
  2343. }
  2344. return HAL_OK;
  2345. }
  2346. /**
  2347. * @brief Handle BTF flag for Slave transmitter
  2348. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2349. * the configuration information for I2C module
  2350. * @retval HAL status
  2351. */
  2352. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  2353. {
  2354. if(hi2c->XferCount != 0)
  2355. {
  2356. /* Write data to DR */
  2357. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2358. hi2c->XferCount--;
  2359. }
  2360. return HAL_OK;
  2361. }
  2362. /**
  2363. * @brief Handle RXNE flag for Slave
  2364. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2365. * the configuration information for I2C module
  2366. * @retval HAL status
  2367. */
  2368. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  2369. {
  2370. if(hi2c->XferCount != 0)
  2371. {
  2372. /* Read data from DR */
  2373. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2374. hi2c->XferCount--;
  2375. }
  2376. return HAL_OK;
  2377. }
  2378. /**
  2379. * @brief Handle BTF flag for Slave receiver
  2380. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2381. * the configuration information for I2C module
  2382. * @retval HAL status
  2383. */
  2384. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  2385. {
  2386. if(hi2c->XferCount != 0)
  2387. {
  2388. /* Read data from DR */
  2389. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2390. hi2c->XferCount--;
  2391. }
  2392. return HAL_OK;
  2393. }
  2394. /**
  2395. * @brief Handle ADD flag for Slave
  2396. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2397. * the configuration information for I2C module
  2398. * @retval HAL status
  2399. */
  2400. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  2401. {
  2402. /* Clear ADDR flag */
  2403. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2404. return HAL_OK;
  2405. }
  2406. /**
  2407. * @brief Handle STOPF flag for Slave
  2408. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2409. * the configuration information for I2C module
  2410. * @retval HAL status
  2411. */
  2412. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  2413. {
  2414. /* Disable EVT, BUF and ERR interrupt */
  2415. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2416. /* Clear STOPF flag */
  2417. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  2418. /* Disable Acknowledge */
  2419. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2420. /* Wait until BUSY flag is reset */
  2421. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2422. {
  2423. return HAL_TIMEOUT;
  2424. }
  2425. hi2c->State = HAL_I2C_STATE_READY;
  2426. HAL_I2C_SlaveRxCpltCallback(hi2c);
  2427. return HAL_OK;
  2428. }
  2429. /**
  2430. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2431. * the configuration information for I2C module
  2432. * @retval HAL status
  2433. */
  2434. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  2435. {
  2436. /* Disable EVT, BUF and ERR interrupt */
  2437. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2438. /* Clear AF flag */
  2439. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2440. /* Disable Acknowledge */
  2441. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2442. /* Wait until BUSY flag is reset */
  2443. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2444. {
  2445. return HAL_TIMEOUT;
  2446. }
  2447. hi2c->State = HAL_I2C_STATE_READY;
  2448. HAL_I2C_SlaveTxCpltCallback(hi2c);
  2449. return HAL_OK;
  2450. }
  2451. /**
  2452. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2453. * the configuration information for I2C module
  2454. * @param DevAddress: Target device address
  2455. * @param Timeout: Timeout duration
  2456. * @retval HAL status
  2457. */
  2458. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
  2459. {
  2460. /* Generate Start */
  2461. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2462. /* Wait until SB flag is set */
  2463. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2464. {
  2465. return HAL_TIMEOUT;
  2466. }
  2467. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  2468. {
  2469. /* Send slave address */
  2470. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2471. }
  2472. else
  2473. {
  2474. /* Send header of slave address */
  2475. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  2476. /* Wait until ADD10 flag is set */
  2477. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
  2478. {
  2479. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2480. {
  2481. return HAL_ERROR;
  2482. }
  2483. else
  2484. {
  2485. return HAL_TIMEOUT;
  2486. }
  2487. }
  2488. /* Send slave address */
  2489. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  2490. }
  2491. /* Wait until ADDR flag is set */
  2492. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2493. {
  2494. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2495. {
  2496. return HAL_ERROR;
  2497. }
  2498. else
  2499. {
  2500. return HAL_TIMEOUT;
  2501. }
  2502. }
  2503. return HAL_OK;
  2504. }
  2505. /**
  2506. * @brief Master sends target device address for read request.
  2507. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2508. * the configuration information for I2C module
  2509. * @param DevAddress: Target device address
  2510. * @param Timeout: Timeout duration
  2511. * @retval HAL status
  2512. */
  2513. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
  2514. {
  2515. /* Enable Acknowledge */
  2516. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2517. /* Generate Start */
  2518. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2519. /* Wait until SB flag is set */
  2520. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2521. {
  2522. return HAL_TIMEOUT;
  2523. }
  2524. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  2525. {
  2526. /* Send slave address */
  2527. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  2528. }
  2529. else
  2530. {
  2531. /* Send header of slave address */
  2532. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  2533. /* Wait until ADD10 flag is set */
  2534. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
  2535. {
  2536. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2537. {
  2538. return HAL_ERROR;
  2539. }
  2540. else
  2541. {
  2542. return HAL_TIMEOUT;
  2543. }
  2544. }
  2545. /* Send slave address */
  2546. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  2547. /* Wait until ADDR flag is set */
  2548. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2549. {
  2550. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2551. {
  2552. return HAL_ERROR;
  2553. }
  2554. else
  2555. {
  2556. return HAL_TIMEOUT;
  2557. }
  2558. }
  2559. /* Clear ADDR flag */
  2560. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2561. /* Generate Restart */
  2562. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2563. /* Wait until SB flag is set */
  2564. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2565. {
  2566. return HAL_TIMEOUT;
  2567. }
  2568. /* Send header of slave address */
  2569. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  2570. }
  2571. /* Wait until ADDR flag is set */
  2572. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2573. {
  2574. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2575. {
  2576. return HAL_ERROR;
  2577. }
  2578. else
  2579. {
  2580. return HAL_TIMEOUT;
  2581. }
  2582. }
  2583. return HAL_OK;
  2584. }
  2585. /**
  2586. * @brief Master sends target device address followed by internal memory address for write request.
  2587. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2588. * the configuration information for I2C module
  2589. * @param DevAddress: Target device address
  2590. * @param MemAddress: Internal memory address
  2591. * @param MemAddSize: Size of internal memory address
  2592. * @param Timeout: Timeout duration
  2593. * @retval HAL status
  2594. */
  2595. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
  2596. {
  2597. /* Generate Start */
  2598. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2599. /* Wait until SB flag is set */
  2600. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2601. {
  2602. return HAL_TIMEOUT;
  2603. }
  2604. /* Send slave address */
  2605. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2606. /* Wait until ADDR flag is set */
  2607. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2608. {
  2609. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2610. {
  2611. return HAL_ERROR;
  2612. }
  2613. else
  2614. {
  2615. return HAL_TIMEOUT;
  2616. }
  2617. }
  2618. /* Clear ADDR flag */
  2619. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2620. /* Wait until TXE flag is set */
  2621. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  2622. {
  2623. return HAL_TIMEOUT;
  2624. }
  2625. /* If Memory address size is 8Bit */
  2626. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  2627. {
  2628. /* Send Memory Address */
  2629. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  2630. }
  2631. /* If Memory address size is 16Bit */
  2632. else
  2633. {
  2634. /* Send MSB of Memory Address */
  2635. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  2636. /* Wait until TXE flag is set */
  2637. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  2638. {
  2639. return HAL_TIMEOUT;
  2640. }
  2641. /* Send LSB of Memory Address */
  2642. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  2643. }
  2644. return HAL_OK;
  2645. }
  2646. /**
  2647. * @brief Master sends target device address followed by internal memory address for read request.
  2648. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2649. * the configuration information for I2C module
  2650. * @param DevAddress: Target device address
  2651. * @param MemAddress: Internal memory address
  2652. * @param MemAddSize: Size of internal memory address
  2653. * @param Timeout: Timeout duration
  2654. * @retval HAL status
  2655. */
  2656. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
  2657. {
  2658. /* Enable Acknowledge */
  2659. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2660. /* Generate Start */
  2661. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2662. /* Wait until SB flag is set */
  2663. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2664. {
  2665. return HAL_TIMEOUT;
  2666. }
  2667. /* Send slave address */
  2668. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2669. /* Wait until ADDR flag is set */
  2670. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2671. {
  2672. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2673. {
  2674. return HAL_ERROR;
  2675. }
  2676. else
  2677. {
  2678. return HAL_TIMEOUT;
  2679. }
  2680. }
  2681. /* Clear ADDR flag */
  2682. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2683. /* Wait until TXE flag is set */
  2684. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  2685. {
  2686. return HAL_TIMEOUT;
  2687. }
  2688. /* If Memory address size is 8Bit */
  2689. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  2690. {
  2691. /* Send Memory Address */
  2692. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  2693. }
  2694. /* If Memory address size is 16Bit */
  2695. else
  2696. {
  2697. /* Send MSB of Memory Address */
  2698. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  2699. /* Wait until TXE flag is set */
  2700. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  2701. {
  2702. return HAL_TIMEOUT;
  2703. }
  2704. /* Send LSB of Memory Address */
  2705. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  2706. }
  2707. /* Wait until TXE flag is set */
  2708. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
  2709. {
  2710. return HAL_TIMEOUT;
  2711. }
  2712. /* Generate Restart */
  2713. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2714. /* Wait until SB flag is set */
  2715. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
  2716. {
  2717. return HAL_TIMEOUT;
  2718. }
  2719. /* Send slave address */
  2720. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  2721. /* Wait until ADDR flag is set */
  2722. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
  2723. {
  2724. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2725. {
  2726. return HAL_ERROR;
  2727. }
  2728. else
  2729. {
  2730. return HAL_TIMEOUT;
  2731. }
  2732. }
  2733. return HAL_OK;
  2734. }
  2735. /**
  2736. * @brief DMA I2C master transmit process complete callback.
  2737. * @param hdma: DMA handle
  2738. * @retval None
  2739. */
  2740. static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
  2741. {
  2742. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2743. /* Wait until BTF flag is reset */
  2744. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2745. {
  2746. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2747. }
  2748. /* Generate Stop */
  2749. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2750. /* Disable DMA Request */
  2751. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2752. hi2c->XferCount = 0;
  2753. /* Wait until BUSY flag is reset */
  2754. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2755. {
  2756. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2757. }
  2758. hi2c->State = HAL_I2C_STATE_READY;
  2759. /* Check if Errors has been detected during transfer */
  2760. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2761. {
  2762. HAL_I2C_ErrorCallback(hi2c);
  2763. }
  2764. else
  2765. {
  2766. HAL_I2C_MasterTxCpltCallback(hi2c);
  2767. }
  2768. }
  2769. /**
  2770. * @brief DMA I2C slave transmit process complete callback.
  2771. * @param hdma: DMA handle
  2772. * @retval None
  2773. */
  2774. static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
  2775. {
  2776. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2777. /* Wait until AF flag is reset */
  2778. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2779. {
  2780. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2781. }
  2782. /* Clear AF flag */
  2783. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2784. /* Disable Address Acknowledge */
  2785. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2786. /* Disable DMA Request */
  2787. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2788. hi2c->XferCount = 0;
  2789. /* Wait until BUSY flag is reset */
  2790. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2791. {
  2792. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2793. }
  2794. hi2c->State = HAL_I2C_STATE_READY;
  2795. /* Check if Errors has been detected during transfer */
  2796. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2797. {
  2798. HAL_I2C_ErrorCallback(hi2c);
  2799. }
  2800. else
  2801. {
  2802. HAL_I2C_SlaveTxCpltCallback(hi2c);
  2803. }
  2804. }
  2805. /**
  2806. * @brief DMA I2C master receive process complete callback
  2807. * @param hdma: DMA handle
  2808. * @retval None
  2809. */
  2810. static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
  2811. {
  2812. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2813. /* Generate Stop */
  2814. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2815. /* Disable Last DMA */
  2816. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  2817. /* Disable Acknowledge */
  2818. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2819. /* Disable DMA Request */
  2820. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2821. hi2c->XferCount = 0;
  2822. /* Wait until BUSY flag is reset */
  2823. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2824. {
  2825. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2826. }
  2827. hi2c->State = HAL_I2C_STATE_READY;
  2828. /* Check if Errors has been detected during transfer */
  2829. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2830. {
  2831. HAL_I2C_ErrorCallback(hi2c);
  2832. }
  2833. else
  2834. {
  2835. HAL_I2C_MasterRxCpltCallback(hi2c);
  2836. }
  2837. }
  2838. /**
  2839. * @brief DMA I2C slave receive process complete callback.
  2840. * @param hdma: DMA handle
  2841. * @retval None
  2842. */
  2843. static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
  2844. {
  2845. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2846. /* Wait until STOPF flag is reset */
  2847. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2848. {
  2849. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2850. }
  2851. /* Clear STOPF flag */
  2852. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  2853. /* Disable Address Acknowledge */
  2854. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2855. /* Disable DMA Request */
  2856. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2857. hi2c->XferCount = 0;
  2858. /* Wait until BUSY flag is reset */
  2859. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2860. {
  2861. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2862. }
  2863. hi2c->State = HAL_I2C_STATE_READY;
  2864. /* Check if Errors has been detected during transfer */
  2865. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2866. {
  2867. HAL_I2C_ErrorCallback(hi2c);
  2868. }
  2869. else
  2870. {
  2871. HAL_I2C_SlaveRxCpltCallback(hi2c);
  2872. }
  2873. }
  2874. /**
  2875. * @brief DMA I2C Memory Write process complete callback
  2876. * @param hdma: DMA handle
  2877. * @retval None
  2878. */
  2879. static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
  2880. {
  2881. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2882. /* Wait until BTF flag is reset */
  2883. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2884. {
  2885. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2886. }
  2887. /* Generate Stop */
  2888. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2889. /* Disable DMA Request */
  2890. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2891. hi2c->XferCount = 0;
  2892. /* Wait until BUSY flag is reset */
  2893. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2894. {
  2895. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2896. }
  2897. hi2c->State = HAL_I2C_STATE_READY;
  2898. /* Check if Errors has been detected during transfer */
  2899. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2900. {
  2901. HAL_I2C_ErrorCallback(hi2c);
  2902. }
  2903. else
  2904. {
  2905. HAL_I2C_MemTxCpltCallback(hi2c);
  2906. }
  2907. }
  2908. /**
  2909. * @brief DMA I2C Memory Read process complete callback
  2910. * @param hdma: DMA handle
  2911. * @retval None
  2912. */
  2913. static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
  2914. {
  2915. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2916. /* Generate Stop */
  2917. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2918. /* Disable Last DMA */
  2919. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  2920. /* Disable Acknowledge */
  2921. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2922. /* Disable DMA Request */
  2923. CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2924. hi2c->XferCount = 0;
  2925. /* Wait until BUSY flag is reset */
  2926. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
  2927. {
  2928. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2929. }
  2930. hi2c->State = HAL_I2C_STATE_READY;
  2931. /* Check if Errors has been detected during transfer */
  2932. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2933. {
  2934. HAL_I2C_ErrorCallback(hi2c);
  2935. }
  2936. else
  2937. {
  2938. HAL_I2C_MemRxCpltCallback(hi2c);
  2939. }
  2940. }
  2941. /**
  2942. * @brief DMA I2C communication error callback.
  2943. * @param hdma: DMA handle
  2944. * @retval None
  2945. */
  2946. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  2947. {
  2948. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2949. /* Disable Acknowledge */
  2950. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2951. hi2c->XferCount = 0;
  2952. hi2c->State = HAL_I2C_STATE_READY;
  2953. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2954. HAL_I2C_ErrorCallback(hi2c);
  2955. }
  2956. /**
  2957. * @brief This function handles I2C Communication Timeout.
  2958. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  2959. * the configuration information for I2C module
  2960. * @param Flag: specifies the I2C flag to check.
  2961. * @param Status: The new Flag status (SET or RESET).
  2962. * @param Timeout: Timeout duration
  2963. * @retval HAL status
  2964. */
  2965. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  2966. {
  2967. uint32_t tickstart = 0;
  2968. /* Get tick */
  2969. tickstart = HAL_GetTick();
  2970. /* Wait until flag is set */
  2971. if(Status == RESET)
  2972. {
  2973. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  2974. {
  2975. /* Check for the Timeout */
  2976. if(Timeout != HAL_MAX_DELAY)
  2977. {
  2978. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  2979. {
  2980. hi2c->State= HAL_I2C_STATE_READY;
  2981. /* Process Unlocked */
  2982. __HAL_UNLOCK(hi2c);
  2983. return HAL_TIMEOUT;
  2984. }
  2985. }
  2986. }
  2987. }
  2988. else
  2989. {
  2990. while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
  2991. {
  2992. /* Check for the Timeout */
  2993. if(Timeout != HAL_MAX_DELAY)
  2994. {
  2995. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  2996. {
  2997. hi2c->State= HAL_I2C_STATE_READY;
  2998. /* Process Unlocked */
  2999. __HAL_UNLOCK(hi2c);
  3000. return HAL_TIMEOUT;
  3001. }
  3002. }
  3003. }
  3004. }
  3005. return HAL_OK;
  3006. }
  3007. /**
  3008. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  3009. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  3010. * the configuration information for I2C module
  3011. * @param Flag: specifies the I2C flag to check.
  3012. * @param Timeout: Timeout duration
  3013. * @retval HAL status
  3014. */
  3015. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
  3016. {
  3017. uint32_t tickstart = 0;
  3018. /* Get tick */
  3019. tickstart = HAL_GetTick();
  3020. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  3021. {
  3022. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  3023. {
  3024. /* Generate Stop */
  3025. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  3026. /* Clear AF Flag */
  3027. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3028. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  3029. hi2c->State= HAL_I2C_STATE_READY;
  3030. /* Process Unlocked */
  3031. __HAL_UNLOCK(hi2c);
  3032. return HAL_ERROR;
  3033. }
  3034. /* Check for the Timeout */
  3035. if(Timeout != HAL_MAX_DELAY)
  3036. {
  3037. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  3038. {
  3039. hi2c->State= HAL_I2C_STATE_READY;
  3040. /* Process Unlocked */
  3041. __HAL_UNLOCK(hi2c);
  3042. return HAL_TIMEOUT;
  3043. }
  3044. }
  3045. }
  3046. return HAL_OK;
  3047. }
  3048. /**
  3049. * @}
  3050. */
  3051. #endif /* HAL_I2C_MODULE_ENABLED */
  3052. /**
  3053. * @}
  3054. */
  3055. /**
  3056. * @}
  3057. */
  3058. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/