stm32l1xx_hal_pcd.h 32 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 5-September-2014
  7. * @brief Header file of PCD HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L1xx_HAL_PCD_H
  39. #define __STM32L1xx_HAL_PCD_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32l1xx_hal_def.h"
  45. /** @addtogroup STM32L1xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup PCD
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup PCD_Exported_Types PCD Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief PCD State structures definition
  57. */
  58. typedef enum
  59. {
  60. PCD_READY = 0x00,
  61. PCD_ERROR = 0x01,
  62. PCD_BUSY = 0x02,
  63. PCD_TIMEOUT = 0x03
  64. } PCD_StateTypeDef;
  65. typedef enum
  66. {
  67. /* double buffered endpoint direction */
  68. PCD_EP_DBUF_OUT,
  69. PCD_EP_DBUF_IN,
  70. PCD_EP_DBUF_ERR,
  71. }PCD_EP_DBUF_DIR;
  72. /* endpoint buffer number */
  73. typedef enum
  74. {
  75. PCD_EP_NOBUF,
  76. PCD_EP_BUF0,
  77. PCD_EP_BUF1
  78. }PCD_EP_BUF_NUM;
  79. /**
  80. * @brief PCD Initialization Structure definition
  81. */
  82. typedef struct
  83. {
  84. uint32_t dev_endpoints; /*!< Device Endpoints number.
  85. This parameter depends on the used USB core.
  86. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  87. uint32_t speed; /*!< USB Core speed.
  88. This parameter can be any value of @ref USB_Core_Speed */
  89. uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
  90. This parameter can be any value of @ref USB_EP0_MPS */
  91. uint32_t phy_itface; /*!< Select the used PHY interface.
  92. This parameter can be any value of @ref USB_Core_PHY */
  93. uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
  94. uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
  95. uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
  96. uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
  97. }PCD_InitTypeDef;
  98. typedef struct
  99. {
  100. uint8_t num; /*!< Endpoint number
  101. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  102. uint8_t is_in; /*!< Endpoint direction
  103. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  104. uint8_t is_stall; /*!< Endpoint stall condition
  105. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  106. uint8_t type; /*!< Endpoint type
  107. This parameter can be any value of @ref USB_EP_Type */
  108. uint16_t pmaadress; /*!< PMA Address
  109. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  110. uint16_t pmaaddr0; /*!< PMA Address0
  111. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  112. uint16_t pmaaddr1; /*!< PMA Address1
  113. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  114. uint8_t doublebuffer; /*!< Double buffer enable
  115. This parameter can be 0 or 1 */
  116. uint32_t maxpacket; /*!< Endpoint Max packet size
  117. This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
  118. uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
  119. uint32_t xfer_len; /*!< Current transfer length */
  120. uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
  121. }PCD_EPTypeDef;
  122. typedef USB_TypeDef PCD_TypeDef;
  123. /**
  124. * @brief PCD Handle Structure definition
  125. */
  126. typedef struct
  127. {
  128. PCD_TypeDef *Instance; /*!< Register base address */
  129. PCD_InitTypeDef Init; /*!< PCD required parameters */
  130. __IO uint8_t USB_Address; /*!< USB Address */
  131. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  132. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  133. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  134. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  135. uint32_t Setup[12]; /*!< Setup packet buffer */
  136. void *pData; /*!< Pointer to upper stack Handler */
  137. } PCD_HandleTypeDef;
  138. /**
  139. * @}
  140. */
  141. #include "stm32l1xx_hal_pcd_ex.h"
  142. /* Exported constants --------------------------------------------------------*/
  143. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  144. * @{
  145. */
  146. /** @defgroup USB_Exti_Line_Wakeup USB_Exti_Line_Wakeup
  147. * @{
  148. */
  149. #define USB_EXTI_LINE_WAKEUP ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
  150. /**
  151. * @}
  152. */
  153. /** @defgroup USB_Core_Speed USB Core Speed
  154. * @{
  155. */
  156. #define PCD_SPEED_HIGH 0 /* Not Supported */
  157. #define PCD_SPEED_FULL 2
  158. /**
  159. * @}
  160. */
  161. /** @defgroup USB_Core_PHY USB Core PHY
  162. * @{
  163. */
  164. #define PCD_PHY_EMBEDDED 2
  165. /**
  166. * @}
  167. */
  168. /** @defgroup USB_EP0_MPS USB EP0 MPS
  169. * @{
  170. */
  171. #define DEP0CTL_MPS_64 0
  172. #define DEP0CTL_MPS_32 1
  173. #define DEP0CTL_MPS_16 2
  174. #define DEP0CTL_MPS_8 3
  175. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  176. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  177. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  178. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  179. /**
  180. * @}
  181. */
  182. /** @defgroup USB_EP_Type USB EP Type
  183. * @{
  184. */
  185. #define PCD_EP_TYPE_CTRL 0
  186. #define PCD_EP_TYPE_ISOC 1
  187. #define PCD_EP_TYPE_BULK 2
  188. #define PCD_EP_TYPE_INTR 3
  189. /**
  190. * @}
  191. */
  192. /** @defgroup USB_ENDP_Type USB_ENDP_Type
  193. * @{
  194. */
  195. #define PCD_ENDP0 ((uint8_t)0)
  196. #define PCD_ENDP1 ((uint8_t)1)
  197. #define PCD_ENDP2 ((uint8_t)2)
  198. #define PCD_ENDP3 ((uint8_t)3)
  199. #define PCD_ENDP4 ((uint8_t)4)
  200. #define PCD_ENDP5 ((uint8_t)5)
  201. #define PCD_ENDP6 ((uint8_t)6)
  202. #define PCD_ENDP7 ((uint8_t)7)
  203. /* Endpoint Kind */
  204. #define PCD_SNG_BUF 0
  205. #define PCD_DBL_BUF 1
  206. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  207. /**
  208. * @}
  209. */
  210. /**
  211. * @}
  212. */
  213. /* Exported macros -----------------------------------------------------------*/
  214. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  215. * @brief macros to handle interrupts and specific clock configurations
  216. * @{
  217. */
  218. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
  219. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  220. #define __HAL_USB_EXTI_ENABLE_IT() EXTI->IMR |= USB_EXTI_LINE_WAKEUP
  221. #define __HAL_USB_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_EXTI_LINE_WAKEUP)
  222. #define __HAL_USB_EXTI_GET_FLAG() EXTI->PR & (USB_EXTI_LINE_WAKEUP)
  223. #define __HAL_USB_EXTI_CLEAR_FLAG() EXTI->PR = USB_EXTI_LINE_WAKEUP
  224. #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
  225. EXTI->RTSR |= USB_EXTI_LINE_WAKEUP
  226. #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER() EXTI->FTSR |= (USB_EXTI_LINE_WAKEUP);\
  227. EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP)
  228. #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP);\
  229. EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
  230. EXTI->RTSR |= USB_EXTI_LINE_WAKEUP;\
  231. EXTI->FTSR |= USB_EXTI_LINE_WAKEUP
  232. /**
  233. * @}
  234. */
  235. /* Internal macros -----------------------------------------------------------*/
  236. /** @defgroup PCD_Private_Macros PCD Private Macros
  237. * @brief macros to handle interrupts and specific clock configurations
  238. * @{
  239. */
  240. /* SetENDPOINT */
  241. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
  242. /* GetENDPOINT */
  243. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2))
  244. /**
  245. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  246. * @param USBx: USB peripheral instance register address.
  247. * @param bEpNum: Endpoint Number.
  248. * @param wType: Endpoint Type.
  249. * @retval None
  250. */
  251. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  252. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  253. /**
  254. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  255. * @param USBx: USB peripheral instance register address.
  256. * @param bEpNum: Endpoint Number.
  257. * @retval Endpoint Type
  258. */
  259. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  260. /**
  261. * @brief free buffer used from the application realizing it to the line
  262. toggles bit SW_BUF in the double buffered endpoint register
  263. * @param USBx: USB peripheral instance register address.
  264. * @param bEpNum: Endpoint Number.
  265. * @param bDir: Direction
  266. * @retval None
  267. */
  268. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  269. {\
  270. if ((bDir) == PCD_EP_DBUF_OUT)\
  271. { /* OUT double buffered endpoint */\
  272. PCD_TX_DTOG((USBx), (bEpNum));\
  273. }\
  274. else if ((bDir) == PCD_EP_DBUF_IN)\
  275. { /* IN double buffered endpoint */\
  276. PCD_RX_DTOG((USBx), (bEpNum));\
  277. }\
  278. }
  279. /**
  280. * @brief gets direction of the double buffered endpoint
  281. * @param USBx: USB peripheral instance register address.
  282. * @param bEpNum: Endpoint Number.
  283. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  284. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  285. */
  286. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  287. {\
  288. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  289. return(PCD_EP_DBUF_OUT);\
  290. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  291. return(PCD_EP_DBUF_IN);\
  292. else\
  293. return(PCD_EP_DBUF_ERR);\
  294. }
  295. /**
  296. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  297. * @param USBx: USB peripheral instance register address.
  298. * @param bEpNum: Endpoint Number.
  299. * @param wState: new state
  300. * @retval None
  301. */
  302. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  303. \
  304. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  305. /* toggle first bit ? */ \
  306. if((USB_EPTX_DTOG1 & (wState))!= 0) \
  307. { \
  308. _wRegVal ^= USB_EPTX_DTOG1; \
  309. } \
  310. /* toggle second bit ? */ \
  311. if((USB_EPTX_DTOG2 & (wState))!= 0) \
  312. { \
  313. _wRegVal ^= USB_EPTX_DTOG2; \
  314. } \
  315. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  316. } /* PCD_SET_EP_TX_STATUS */
  317. /**
  318. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  319. * @param USBx: USB peripheral instance register address.
  320. * @param bEpNum: Endpoint Number.
  321. * @param wState: new state
  322. * @retval None
  323. */
  324. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  325. register uint16_t _wRegVal; \
  326. \
  327. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  328. /* toggle first bit ? */ \
  329. if((USB_EPRX_DTOG1 & (wState))!= 0) \
  330. { \
  331. _wRegVal ^= USB_EPRX_DTOG1; \
  332. } \
  333. /* toggle second bit ? */ \
  334. if((USB_EPRX_DTOG2 & (wState))!= 0) \
  335. { \
  336. _wRegVal ^= USB_EPRX_DTOG2; \
  337. } \
  338. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  339. } /* PCD_SET_EP_RX_STATUS */
  340. /**
  341. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  342. * @param USBx: USB peripheral instance register address.
  343. * @param bEpNum: Endpoint Number.
  344. * @param wStaterx: new state.
  345. * @param wStatetx: new state.
  346. * @retval None
  347. */
  348. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  349. register uint32_t _wRegVal; \
  350. \
  351. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  352. /* toggle first bit ? */ \
  353. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
  354. { \
  355. _wRegVal ^= USB_EPRX_DTOG1; \
  356. } \
  357. /* toggle second bit ? */ \
  358. if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
  359. { \
  360. _wRegVal ^= USB_EPRX_DTOG2; \
  361. } \
  362. /* toggle first bit ? */ \
  363. if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
  364. { \
  365. _wRegVal ^= USB_EPTX_DTOG1; \
  366. } \
  367. /* toggle second bit ? */ \
  368. if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
  369. { \
  370. _wRegVal ^= USB_EPTX_DTOG2; \
  371. } \
  372. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  373. } /* PCD_SET_EP_TXRX_STATUS */
  374. /**
  375. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  376. * /STAT_RX[1:0])
  377. * @param USBx: USB peripheral instance register address.
  378. * @param bEpNum: Endpoint Number.
  379. * @retval status
  380. */
  381. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  382. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  383. /**
  384. * @brief sets directly the VALID tx/rx-status into the endpoint register
  385. * @param USBx: USB peripheral instance register address.
  386. * @param bEpNum: Endpoint Number.
  387. * @retval None
  388. */
  389. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  390. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  391. /**
  392. * @brief checks stall condition in an endpoint.
  393. * @param USBx: USB peripheral instance register address.
  394. * @param bEpNum: Endpoint Number.
  395. * @retval TRUE = endpoint in stall condition.
  396. */
  397. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  398. == USB_EP_TX_STALL)
  399. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  400. == USB_EP_RX_STALL)
  401. /**
  402. * @brief set & clear EP_KIND bit.
  403. * @param USBx: USB peripheral instance register address.
  404. * @param bEpNum: Endpoint Number.
  405. * @retval None
  406. */
  407. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  408. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  409. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  410. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  411. /**
  412. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  413. * @param USBx: USB peripheral instance register address.
  414. * @param bEpNum: Endpoint Number.
  415. * @retval None
  416. */
  417. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  418. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  419. /**
  420. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  421. * @param USBx: USB peripheral instance register address.
  422. * @param bEpNum: Endpoint Number.
  423. * @retval None
  424. */
  425. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  426. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  427. /**
  428. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  429. * @param USBx: USB peripheral instance register address.
  430. * @param bEpNum: Endpoint Number.
  431. * @retval None
  432. */
  433. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  434. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
  435. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  436. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
  437. /**
  438. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  439. * @param USBx: USB peripheral instance register address.
  440. * @param bEpNum: Endpoint Number.
  441. * @retval None
  442. */
  443. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  444. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  445. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  446. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  447. /**
  448. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  449. * @param USBx: USB peripheral instance register address.
  450. * @param bEpNum: Endpoint Number.
  451. * @retval None
  452. */
  453. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
  454. { \
  455. PCD_RX_DTOG((USBx), (bEpNum)); \
  456. }
  457. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
  458. { \
  459. PCD_TX_DTOG((USBx), (bEpNum)); \
  460. }
  461. /**
  462. * @brief Sets address in an endpoint register.
  463. * @param USBx: USB peripheral instance register address.
  464. * @param bEpNum: Endpoint Number.
  465. * @param bAddr: Address.
  466. * @retval None
  467. */
  468. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  469. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  470. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  471. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8)*2+ ((uint32_t)(USBx) + 0x400)))
  472. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+2)*2+ ((uint32_t)(USBx) + 0x400)))
  473. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+4)*2+ ((uint32_t)(USBx) + 0x400)))
  474. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+6)*2+ ((uint32_t)(USBx) + 0x400)))
  475. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  476. uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  477. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  478. }
  479. /**
  480. * @brief sets address of the tx/rx buffer.
  481. * @param USBx: USB peripheral instance register address.
  482. * @param bEpNum: Endpoint Number.
  483. * @param wAddr: address to be set (must be word aligned).
  484. * @retval None
  485. */
  486. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  487. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  488. /**
  489. * @brief Gets address of the tx/rx buffer.
  490. * @param USBx: USB peripheral instance register address.
  491. * @param bEpNum: Endpoint Number.
  492. * @retval address of the buffer.
  493. */
  494. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  495. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  496. /**
  497. * @brief Sets counter of rx buffer with no. of blocks.
  498. * @param dwReg: Register
  499. * @param wCount: Counter.
  500. * @param wNBlocks: no. of Blocks.
  501. * @retval None
  502. */
  503. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  504. (wNBlocks) = (wCount) >> 5;\
  505. if(((wCount) & 0x1f) == 0)\
  506. { \
  507. (wNBlocks)--;\
  508. } \
  509. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
  510. }/* PCD_CALC_BLK32 */
  511. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  512. (wNBlocks) = (wCount) >> 1;\
  513. if(((wCount) & 0x1) != 0)\
  514. { \
  515. (wNBlocks)++;\
  516. } \
  517. *pdwReg = (uint16_t)((wNBlocks) << 10);\
  518. }/* PCD_CALC_BLK2 */
  519. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  520. uint16_t wNBlocks;\
  521. if((wCount) > 62) \
  522. { \
  523. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  524. } \
  525. else \
  526. { \
  527. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  528. } \
  529. }/* PCD_SET_EP_CNT_RX_REG */
  530. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  531. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  532. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  533. }
  534. /**
  535. * @brief sets counter for the tx/rx buffer.
  536. * @param USBx: USB peripheral instance register address.
  537. * @param bEpNum: Endpoint Number.
  538. * @param wCount: Counter value.
  539. * @retval None
  540. */
  541. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  542. /**
  543. * @brief gets counter of the tx buffer.
  544. * @param USBx: USB peripheral instance register address.
  545. * @param bEpNum: Endpoint Number.
  546. * @retval Counter value
  547. */
  548. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
  549. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
  550. /**
  551. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  552. * @param USBx: USB peripheral instance register address.
  553. * @param bEpNum: Endpoint Number.
  554. * @param wBuf0Addr: buffer 0 address.
  555. * @retval Counter value
  556. */
  557. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  558. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  559. /**
  560. * @brief Sets addresses in a double buffer endpoint.
  561. * @param USBx: USB peripheral instance register address.
  562. * @param bEpNum: Endpoint Number.
  563. * @param wBuf0Addr: buffer 0 address.
  564. * @param wBuf1Addr = buffer 1 address.
  565. * @retval None
  566. */
  567. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  568. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  569. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  570. } /* PCD_SET_EP_DBUF_ADDR */
  571. /**
  572. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  573. * @param USBx: USB peripheral instance register address.
  574. * @param bEpNum: Endpoint Number.
  575. * @retval None
  576. */
  577. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  578. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  579. /**
  580. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  581. * @param USBx: USB peripheral instance register address.
  582. * @param bEpNum: Endpoint Number.
  583. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  584. * EP_DBUF_IN = IN
  585. * @param wCount: Counter value
  586. * @retval None
  587. */
  588. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  589. if((bDir) == PCD_EP_DBUF_OUT)\
  590. /* OUT endpoint */ \
  591. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  592. else if((bDir) == PCD_EP_DBUF_IN)\
  593. /* IN endpoint */ \
  594. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  595. } /* SetEPDblBuf0Count*/
  596. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  597. if((bDir) == PCD_EP_DBUF_OUT)\
  598. {/* OUT endpoint */ \
  599. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  600. } \
  601. else if((bDir) == PCD_EP_DBUF_IN)\
  602. {/* IN endpoint */ \
  603. *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  604. } \
  605. } /* SetEPDblBuf1Count */
  606. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  607. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  608. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  609. } /* PCD_SET_EP_DBUF_CNT */
  610. /**
  611. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  612. * @param USBx: USB peripheral instance register address.
  613. * @param bEpNum: Endpoint Number.
  614. * @retval None
  615. */
  616. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  617. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  618. /**
  619. * @}
  620. */
  621. /* Exported functions --------------------------------------------------------*/
  622. /** @addtogroup PCD_Exported_Functions
  623. * @{
  624. */
  625. /* Initialization/de-initialization functions **********************************/
  626. /** @addtogroup PCD_Exported_Functions_Group1
  627. * @{
  628. */
  629. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  630. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  631. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  632. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  633. /**
  634. * @}
  635. */
  636. /* I/O operation functions *****************************************************/
  637. /* Non-Blocking mode: Interrupt */
  638. /** @addtogroup PCD_Exported_Functions_Group2
  639. * @{
  640. */
  641. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  642. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  643. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  644. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  645. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  646. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  647. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  648. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  649. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  650. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  651. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  652. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  653. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  654. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  655. /**
  656. * @}
  657. */
  658. /* Peripheral Control functions ************************************************/
  659. /** @addtogroup PCD_Exported_Functions_Group3
  660. * @{
  661. */
  662. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  663. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  664. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  665. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  666. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  667. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  668. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  669. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  670. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  671. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  672. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  673. HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
  674. HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
  675. /**
  676. * @}
  677. */
  678. /* Peripheral State functions **************************************************/
  679. /** @addtogroup PCD_Exported_Functions_Group4
  680. * @{
  681. */
  682. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  683. void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
  684. /**
  685. * @}
  686. */
  687. /**
  688. * @}
  689. */
  690. /**
  691. * @}
  692. */
  693. /**
  694. * @}
  695. */
  696. #ifdef __cplusplus
  697. }
  698. #endif
  699. #endif /* __STM32L1xx_HAL_PCD_H */
  700. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/