stm32f4xx_hal_adc_ex.h 18 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_adc_ex.h
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief Header file of ADC HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_ADC_EX_H
  39. #define __STM32F4xx_ADC_EX_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx_hal_def.h"
  45. /** @addtogroup STM32F4xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup ADCEx
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup ADCEx_Exported_Types ADC Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief ADC Configuration injected Channel structure definition
  57. */
  58. typedef struct
  59. {
  60. uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
  61. This parameter can be a value of @ref ADC_channels */
  62. uint32_t InjectedRank; /*!< The rank in the injected group sequencer
  63. This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
  64. uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
  65. This parameter can be a value of @ref ADC_sampling_times */
  66. uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
  67. This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
  68. uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
  69. injected channel group.
  70. This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
  71. uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
  72. conversion after regular one */
  73. uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
  74. This parameter can be set to ENABLE or DISABLE. */
  75. uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
  76. This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
  77. uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
  78. This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
  79. }ADC_InjectionConfTypeDef;
  80. /**
  81. * @brief ADC Configuration multi-mode structure definition
  82. */
  83. typedef struct
  84. {
  85. uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
  86. This parameter can be a value of @ref ADCEx_Common_mode */
  87. uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
  88. This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
  89. uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
  90. This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
  91. }ADC_MultiModeTypeDef;
  92. /**
  93. * @}
  94. */
  95. /* Exported constants --------------------------------------------------------*/
  96. /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
  97. * @{
  98. */
  99. /** @defgroup ADCEx_Common_mode ADC Common Mode
  100. * @{
  101. */
  102. #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
  103. #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
  104. #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
  105. #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
  106. #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
  107. #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
  108. #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
  109. #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
  110. #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
  111. #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
  112. #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
  113. #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
  114. #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
  115. /**
  116. * @}
  117. */
  118. /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
  119. * @{
  120. */
  121. #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
  122. #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
  123. #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
  124. #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
  125. /**
  126. * @}
  127. */
  128. /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
  129. * @{
  130. */
  131. #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
  132. #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
  133. #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
  134. #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
  135. /**
  136. * @}
  137. */
  138. /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
  139. * @{
  140. */
  141. #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
  142. #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
  143. #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
  144. #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  145. #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
  146. #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
  147. #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
  148. #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  149. #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
  150. #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
  151. #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
  152. #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  153. #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
  154. #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
  155. #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
  156. #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
  157. /**
  158. * @}
  159. */
  160. /** @defgroup ADCEx_injected_channel_selection ADC Injected Channel Selection
  161. * @{
  162. */
  163. #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
  164. #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
  165. #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
  166. #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
  167. /**
  168. * @}
  169. */
  170. /** @defgroup ADCEx_channels ADC Specific Channels
  171. * @{
  172. */
  173. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
  174. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
  175. #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
  176. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
  177. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
  178. #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
  179. #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
  180. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
  181. /**
  182. * @}
  183. */
  184. /**
  185. * @}
  186. */
  187. /* Exported macro ------------------------------------------------------------*/
  188. /** @defgroup ADC_Exported_Macros ADC Exported Macros
  189. * @{
  190. */
  191. /**
  192. * @}
  193. */
  194. /* Exported functions --------------------------------------------------------*/
  195. /** @addtogroup ADCEx_Exported_Functions
  196. * @{
  197. */
  198. /** @addtogroup ADCEx_Exported_Functions_Group1
  199. * @{
  200. */
  201. /* I/O operation functions ******************************************************/
  202. HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
  203. HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
  204. HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
  205. HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
  206. HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
  207. uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
  208. HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
  209. HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
  210. uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
  211. void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
  212. /* Peripheral Control functions *************************************************/
  213. HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
  214. HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
  215. /**
  216. * @}
  217. */
  218. /**
  219. * @}
  220. */
  221. /* Private types -------------------------------------------------------------*/
  222. /* Private variables ---------------------------------------------------------*/
  223. /* Private constants ---------------------------------------------------------*/
  224. /** @defgroup ADCEx_Private_Constants ADC Private Constants
  225. * @{
  226. */
  227. /**
  228. * @}
  229. */
  230. /* Private macros ------------------------------------------------------------*/
  231. /** @defgroup ADCEx_Private_Macros ADC Private Macros
  232. * @{
  233. */
  234. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
  235. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
  236. #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
  237. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
  238. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
  239. #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
  240. ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
  241. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
  242. #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
  243. ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
  244. ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
  245. ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
  246. ((MODE) == ADC_DUALMODE_REGSIMULT) || \
  247. ((MODE) == ADC_DUALMODE_INTERL) || \
  248. ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
  249. ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
  250. ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
  251. ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
  252. ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
  253. ((MODE) == ADC_TRIPLEMODE_INTERL) || \
  254. ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
  255. #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
  256. ((MODE) == ADC_DMAACCESSMODE_1) || \
  257. ((MODE) == ADC_DMAACCESSMODE_2) || \
  258. ((MODE) == ADC_DMAACCESSMODE_3))
  259. #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
  260. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
  261. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
  262. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
  263. #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  264. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  265. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  266. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  267. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
  268. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  269. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
  270. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
  271. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
  272. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  273. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
  274. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
  275. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
  276. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
  277. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
  278. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
  279. #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
  280. #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
  281. /**
  282. * @brief Set the selected injected Channel rank.
  283. * @param _CHANNELNB_: Channel number.
  284. * @param _RANKNB_: Rank number.
  285. * @param _JSQR_JL_: Sequence length.
  286. * @retval None
  287. */
  288. #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
  289. /**
  290. * @}
  291. */
  292. /* Private functions ---------------------------------------------------------*/
  293. /** @defgroup ADCEx_Private_Functions ADC Private Functions
  294. * @{
  295. */
  296. /**
  297. * @}
  298. */
  299. /**
  300. * @}
  301. */
  302. /**
  303. * @}
  304. */
  305. #ifdef __cplusplus
  306. }
  307. #endif
  308. #endif /*__STM32F4xx_ADC_EX_H */
  309. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/