stm32f4xx_hal_can.h 35 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_can.h
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief Header file of CAN HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_CAN_H
  39. #define __STM32F4xx_HAL_CAN_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  44. defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  45. defined(STM32F446xx)
  46. /* Includes ------------------------------------------------------------------*/
  47. #include "stm32f4xx_hal_def.h"
  48. /** @addtogroup STM32F4xx_HAL_Driver
  49. * @{
  50. */
  51. /** @addtogroup CAN
  52. * @{
  53. */
  54. /* Exported types ------------------------------------------------------------*/
  55. /** @defgroup CAN_Exported_Types CAN Exported Types
  56. * @{
  57. */
  58. /**
  59. * @brief HAL State structures definition
  60. */
  61. typedef enum
  62. {
  63. HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
  64. HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
  65. HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
  66. HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
  67. HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
  68. HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
  69. HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
  70. HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
  71. }HAL_CAN_StateTypeDef;
  72. /**
  73. * @brief CAN init structure definition
  74. */
  75. typedef struct
  76. {
  77. uint32_t Prescaler; /*!< Specifies the length of a time quantum.
  78. This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
  79. uint32_t Mode; /*!< Specifies the CAN operating mode.
  80. This parameter can be a value of @ref CAN_operating_mode */
  81. uint32_t SJW; /*!< Specifies the maximum number of time quanta
  82. the CAN hardware is allowed to lengthen or
  83. shorten a bit to perform resynchronization.
  84. This parameter can be a value of @ref CAN_synchronisation_jump_width */
  85. uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
  86. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  87. uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
  88. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
  89. uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
  90. This parameter can be set to ENABLE or DISABLE. */
  91. uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
  92. This parameter can be set to ENABLE or DISABLE */
  93. uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
  94. This parameter can be set to ENABLE or DISABLE */
  95. uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
  96. This parameter can be set to ENABLE or DISABLE */
  97. uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
  98. This parameter can be set to ENABLE or DISABLE */
  99. uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
  100. This parameter can be set to ENABLE or DISABLE */
  101. }CAN_InitTypeDef;
  102. /**
  103. * @brief CAN filter configuration structure definition
  104. */
  105. typedef struct
  106. {
  107. uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
  108. configuration, first one for a 16-bit configuration).
  109. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  110. uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
  111. configuration, second one for a 16-bit configuration).
  112. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  113. uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
  114. according to the mode (MSBs for a 32-bit configuration,
  115. first one for a 16-bit configuration).
  116. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  117. uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
  118. according to the mode (LSBs for a 32-bit configuration,
  119. second one for a 16-bit configuration).
  120. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  121. uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
  122. This parameter can be a value of @ref CAN_filter_FIFO */
  123. uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
  124. This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
  125. uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
  126. This parameter can be a value of @ref CAN_filter_mode */
  127. uint32_t FilterScale; /*!< Specifies the filter scale.
  128. This parameter can be a value of @ref CAN_filter_scale */
  129. uint32_t FilterActivation; /*!< Enable or disable the filter.
  130. This parameter can be set to ENABLE or DISABLE. */
  131. uint32_t BankNumber; /*!< Select the start slave bank filter.
  132. This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
  133. }CAN_FilterConfTypeDef;
  134. /**
  135. * @brief CAN Tx message structure definition
  136. */
  137. typedef struct
  138. {
  139. uint32_t StdId; /*!< Specifies the standard identifier.
  140. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  141. uint32_t ExtId; /*!< Specifies the extended identifier.
  142. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  143. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
  144. This parameter can be a value of @ref CAN_Identifier_Type */
  145. uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
  146. This parameter can be a value of @ref CAN_remote_transmission_request */
  147. uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
  148. This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  149. uint8_t Data[8]; /*!< Contains the data to be transmitted.
  150. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  151. }CanTxMsgTypeDef;
  152. /**
  153. * @brief CAN Rx message structure definition
  154. */
  155. typedef struct
  156. {
  157. uint32_t StdId; /*!< Specifies the standard identifier.
  158. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  159. uint32_t ExtId; /*!< Specifies the extended identifier.
  160. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  161. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
  162. This parameter can be a value of @ref CAN_Identifier_Type */
  163. uint32_t RTR; /*!< Specifies the type of frame for the received message.
  164. This parameter can be a value of @ref CAN_remote_transmission_request */
  165. uint32_t DLC; /*!< Specifies the length of the frame that will be received.
  166. This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  167. uint8_t Data[8]; /*!< Contains the data to be received.
  168. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  169. uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
  170. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  171. uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
  172. This parameter can be CAN_FIFO0 or CAN_FIFO1 */
  173. }CanRxMsgTypeDef;
  174. /**
  175. * @brief CAN handle Structure definition
  176. */
  177. typedef struct
  178. {
  179. CAN_TypeDef *Instance; /*!< Register base address */
  180. CAN_InitTypeDef Init; /*!< CAN required parameters */
  181. CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
  182. CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
  183. __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
  184. HAL_LockTypeDef Lock; /*!< CAN locking object */
  185. __IO uint32_t ErrorCode; /*!< CAN Error code */
  186. }CAN_HandleTypeDef;
  187. /**
  188. * @}
  189. */
  190. /* Exported constants --------------------------------------------------------*/
  191. /** @defgroup CAN_Exported_Constants CAN Exported Constants
  192. * @{
  193. */
  194. /** @defgroup HAL_CAN_Error_Code HAL CAN Error Code
  195. * @{
  196. */
  197. #define HAL_CAN_ERROR_NONE 0x00 /*!< No error */
  198. #define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */
  199. #define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */
  200. #define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */
  201. #define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */
  202. #define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */
  203. #define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */
  204. #define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */
  205. #define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */
  206. #define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */
  207. /**
  208. * @}
  209. */
  210. /** @defgroup CAN_InitStatus CAN InitStatus
  211. * @{
  212. */
  213. #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
  214. #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
  215. /**
  216. * @}
  217. */
  218. /** @defgroup CAN_operating_mode CAN Operating Mode
  219. * @{
  220. */
  221. #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
  222. #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
  223. #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
  224. #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
  225. /**
  226. * @}
  227. */
  228. /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
  229. * @{
  230. */
  231. #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
  232. #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
  233. #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
  234. #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
  235. /**
  236. * @}
  237. */
  238. /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
  239. * @{
  240. */
  241. #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
  242. #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
  243. #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
  244. #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
  245. #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
  246. #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
  247. #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
  248. #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
  249. #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
  250. #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
  251. #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
  252. #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
  253. #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
  254. #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
  255. #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
  256. #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
  257. /**
  258. * @}
  259. */
  260. /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
  261. * @{
  262. */
  263. #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
  264. #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
  265. #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
  266. #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
  267. #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
  268. #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
  269. #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
  270. #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
  271. /**
  272. * @}
  273. */
  274. /** @defgroup CAN_filter_mode CAN Filter Mode
  275. * @{
  276. */
  277. #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
  278. #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
  279. /**
  280. * @}
  281. */
  282. /** @defgroup CAN_filter_scale CAN Filter Scale
  283. * @{
  284. */
  285. #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
  286. #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
  287. /**
  288. * @}
  289. */
  290. /** @defgroup CAN_filter_FIFO CAN Filter FIFO
  291. * @{
  292. */
  293. #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
  294. #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
  295. /**
  296. * @}
  297. */
  298. /** @defgroup CAN_Identifier_Type CAN Identifier Type
  299. * @{
  300. */
  301. #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
  302. #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
  303. /**
  304. * @}
  305. */
  306. /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
  307. * @{
  308. */
  309. #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
  310. #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
  311. /**
  312. * @}
  313. */
  314. /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
  315. * @{
  316. */
  317. #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
  318. #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
  319. /**
  320. * @}
  321. */
  322. /** @defgroup CAN_flags CAN Flags
  323. * @{
  324. */
  325. /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
  326. and CAN_ClearFlag() functions. */
  327. /* If the flag is 0x1XXXXXXX, it means that it can only be used with
  328. CAN_GetFlagStatus() function. */
  329. /* Transmit Flags */
  330. #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
  331. #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
  332. #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
  333. #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
  334. #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
  335. #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
  336. #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
  337. #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
  338. #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
  339. /* Receive Flags */
  340. #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
  341. #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
  342. #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
  343. #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
  344. /* Operating Mode Flags */
  345. #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
  346. #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
  347. #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
  348. /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
  349. In this case the SLAK bit can be polled.*/
  350. /* Error Flags */
  351. #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
  352. #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
  353. #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
  354. /**
  355. * @}
  356. */
  357. /** @defgroup CAN_Interrupts CAN Interrupts
  358. * @{
  359. */
  360. #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
  361. /* Receive Interrupts */
  362. #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
  363. #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
  364. #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
  365. #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
  366. #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
  367. #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
  368. /* Operating Mode Interrupts */
  369. #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
  370. #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
  371. /* Error Interrupts */
  372. #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
  373. #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
  374. #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
  375. #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
  376. #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
  377. /**
  378. * @}
  379. */
  380. /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
  381. * @{
  382. */
  383. #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
  384. #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
  385. #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
  386. /**
  387. * @}
  388. */
  389. /**
  390. * @}
  391. */
  392. /* Exported macro ------------------------------------------------------------*/
  393. /** @defgroup CAN_Exported_Macros CAN Exported Macros
  394. * @{
  395. */
  396. /** @brief Reset CAN handle state
  397. * @param __HANDLE__: specifies the CAN Handle.
  398. * @retval None
  399. */
  400. #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
  401. /**
  402. * @brief Enable the specified CAN interrupts.
  403. * @param __HANDLE__: CAN handle
  404. * @param __INTERRUPT__: CAN Interrupt
  405. * @retval None
  406. */
  407. #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
  408. /**
  409. * @brief Disable the specified CAN interrupts.
  410. * @param __HANDLE__: CAN handle
  411. * @param __INTERRUPT__: CAN Interrupt
  412. * @retval None
  413. */
  414. #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
  415. /**
  416. * @brief Return the number of pending received messages.
  417. * @param __HANDLE__: CAN handle
  418. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  419. * @retval The number of pending message.
  420. */
  421. #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  422. ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
  423. /** @brief Check whether the specified CAN flag is set or not.
  424. * @param __HANDLE__: CAN Handle
  425. * @param __FLAG__: specifies the flag to check.
  426. * This parameter can be one of the following values:
  427. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  428. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  429. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  430. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  431. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  432. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  433. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  434. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  435. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  436. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  437. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  438. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  439. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  440. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  441. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  442. * @arg CAN_FLAG_WKU: Wake up Flag
  443. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  444. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  445. * @arg CAN_FLAG_EWG: Error Warning Flag
  446. * @arg CAN_FLAG_EPV: Error Passive Flag
  447. * @arg CAN_FLAG_BOF: Bus-Off Flag
  448. * @retval The new state of __FLAG__ (TRUE or FALSE).
  449. */
  450. #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
  451. ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  452. (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  453. (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  454. (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  455. ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
  456. /** @brief Clear the specified CAN pending flag.
  457. * @param __HANDLE__: CAN Handle.
  458. * @param __FLAG__: specifies the flag to check.
  459. * This parameter can be one of the following values:
  460. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  461. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  462. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  463. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  464. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  465. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  466. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  467. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  468. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  469. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  470. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  471. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  472. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  473. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  474. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  475. * @arg CAN_FLAG_WKU: Wake up Flag
  476. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  477. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  478. * @arg CAN_FLAG_EWG: Error Warning Flag
  479. * @arg CAN_FLAG_EPV: Error Passive Flag
  480. * @arg CAN_FLAG_BOF: Bus-Off Flag
  481. * @retval The new state of __FLAG__ (TRUE or FALSE).
  482. */
  483. #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  484. ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  485. (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  486. (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  487. (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  488. (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
  489. /** @brief Check if the specified CAN interrupt source is enabled or disabled.
  490. * @param __HANDLE__: CAN Handle
  491. * @param __INTERRUPT__: specifies the CAN interrupt source to check.
  492. * This parameter can be one of the following values:
  493. * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  494. * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
  495. * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
  496. * @retval The new state of __IT__ (TRUE or FALSE).
  497. */
  498. #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  499. /**
  500. * @brief Check the transmission status of a CAN Frame.
  501. * @param __HANDLE__: CAN Handle
  502. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  503. * @retval The new status of transmission (TRUE or FALSE).
  504. */
  505. #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
  506. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
  507. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
  508. ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
  509. /**
  510. * @brief Release the specified receive FIFO.
  511. * @param __HANDLE__: CAN handle
  512. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  513. * @retval None
  514. */
  515. #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  516. ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
  517. /**
  518. * @brief Cancel a transmit request.
  519. * @param __HANDLE__: CAN Handle
  520. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  521. * @retval None
  522. */
  523. #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
  524. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
  525. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
  526. ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
  527. /**
  528. * @brief Enable or disable the DBG Freeze for CAN.
  529. * @param __HANDLE__: CAN Handle
  530. * @param __NEWSTATE__: new state of the CAN peripheral.
  531. * This parameter can be: ENABLE (CAN reception/transmission is frozen
  532. * during debug. Reception FIFOs can still be accessed/controlled normally)
  533. * or DISABLE (CAN is working during debug).
  534. * @retval None
  535. */
  536. #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
  537. ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
  538. /**
  539. * @}
  540. */
  541. /* Exported functions --------------------------------------------------------*/
  542. /** @addtogroup CAN_Exported_Functions
  543. * @{
  544. */
  545. /** @addtogroup CAN_Exported_Functions_Group1
  546. * @{
  547. */
  548. /* Initialization/de-initialization functions ***********************************/
  549. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
  550. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
  551. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
  552. void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
  553. void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
  554. /**
  555. * @}
  556. */
  557. /** @addtogroup CAN_Exported_Functions_Group2
  558. * @{
  559. */
  560. /* I/O operation functions ******************************************************/
  561. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
  562. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
  563. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
  564. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
  565. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
  566. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
  567. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
  568. void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
  569. void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
  570. void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
  571. /**
  572. * @}
  573. */
  574. /** @addtogroup CAN_Exported_Functions_Group3
  575. * @{
  576. */
  577. /* Peripheral State functions ***************************************************/
  578. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
  579. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
  580. /**
  581. * @}
  582. */
  583. /**
  584. * @}
  585. */
  586. /* Private types -------------------------------------------------------------*/
  587. /** @defgroup CAN_Private_Types CAN Private Types
  588. * @{
  589. */
  590. /**
  591. * @}
  592. */
  593. /* Private variables ---------------------------------------------------------*/
  594. /** @defgroup CAN_Private_Variables CAN Private Variables
  595. * @{
  596. */
  597. /**
  598. * @}
  599. */
  600. /* Private constants ---------------------------------------------------------*/
  601. /** @defgroup CAN_Private_Constants CAN Private Constants
  602. * @{
  603. */
  604. #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
  605. #define CAN_FLAG_MASK ((uint32_t)0x000000FF)
  606. /**
  607. * @}
  608. */
  609. /* Private macros ------------------------------------------------------------*/
  610. /** @defgroup CAN_Private_Macros CAN Private Macros
  611. * @{
  612. */
  613. #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
  614. ((MODE) == CAN_MODE_LOOPBACK)|| \
  615. ((MODE) == CAN_MODE_SILENT) || \
  616. ((MODE) == CAN_MODE_SILENT_LOOPBACK))
  617. #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
  618. ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
  619. #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
  620. #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
  621. #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
  622. #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
  623. #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
  624. ((MODE) == CAN_FILTERMODE_IDLIST))
  625. #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
  626. ((SCALE) == CAN_FILTERSCALE_32BIT))
  627. #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
  628. ((FIFO) == CAN_FILTER_FIFO1))
  629. #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
  630. #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
  631. #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
  632. #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
  633. #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
  634. #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
  635. ((IDTYPE) == CAN_ID_EXT))
  636. #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
  637. #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
  638. /**
  639. * @}
  640. */
  641. /* Private functions ---------------------------------------------------------*/
  642. /** @defgroup CAN_Private_Functions CAN Private Functions
  643. * @{
  644. */
  645. /**
  646. * @}
  647. */
  648. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
  649. /**
  650. * @}
  651. */
  652. /**
  653. * @}
  654. */
  655. #ifdef __cplusplus
  656. }
  657. #endif
  658. #endif /* __STM32F4xx_CAN_H */
  659. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/