stm32f4xx_hal_can.c 44 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_can.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Controller Area Network (CAN) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State and Error functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. (#) Enable the CAN controller interface clock using
  20. __HAL_RCC_CAN1_CLK_ENABLE() for CAN1 and __HAL_RCC_CAN2_CLK_ENABLE() for CAN2
  21. -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
  22. (#) CAN pins configuration
  23. (++) Enable the clock for the CAN GPIOs using the following function:
  24. __GPIOx_CLK_ENABLE()
  25. (++) Connect and configure the involved CAN pins to AF9 using the
  26. following function HAL_GPIO_Init()
  27. (#) Initialize and configure the CAN using CAN_Init() function.
  28. (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
  29. (#) Receive a CAN frame using HAL_CAN_Receive() function.
  30. *** Polling mode IO operation ***
  31. =================================
  32. [..]
  33. (+) Start the CAN peripheral transmission and wait the end of this operation
  34. using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
  35. according to his end application
  36. (+) Start the CAN peripheral reception and wait the end of this operation
  37. using HAL_CAN_Receive(), at this stage user can specify the value of timeout
  38. according to his end application
  39. *** Interrupt mode IO operation ***
  40. ===================================
  41. [..]
  42. (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
  43. (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()
  44. (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
  45. (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can
  46. add his own code by customization of function pointer HAL_CAN_TxCpltCallback
  47. (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can
  48. add his own code by customization of function pointer HAL_CAN_ErrorCallback
  49. *** CAN HAL driver macros list ***
  50. =============================================
  51. [..]
  52. Below the list of most used macros in CAN HAL driver.
  53. (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
  54. (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
  55. (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
  56. (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
  57. (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
  58. [..]
  59. (@) You can refer to the CAN HAL driver header file for more useful macros
  60. @endverbatim
  61. ******************************************************************************
  62. * @attention
  63. *
  64. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  65. *
  66. * Redistribution and use in source and binary forms, with or without modification,
  67. * are permitted provided that the following conditions are met:
  68. * 1. Redistributions of source code must retain the above copyright notice,
  69. * this list of conditions and the following disclaimer.
  70. * 2. Redistributions in binary form must reproduce the above copyright notice,
  71. * this list of conditions and the following disclaimer in the documentation
  72. * and/or other materials provided with the distribution.
  73. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  74. * may be used to endorse or promote products derived from this software
  75. * without specific prior written permission.
  76. *
  77. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  78. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  79. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  80. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  81. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  82. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  83. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  84. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  85. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  86. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87. *
  88. ******************************************************************************
  89. */
  90. /* Includes ------------------------------------------------------------------*/
  91. #include "stm32f4xx_hal.h"
  92. /** @addtogroup STM32F4xx_HAL_Driver
  93. * @{
  94. */
  95. /** @defgroup CAN CAN
  96. * @brief CAN driver modules
  97. * @{
  98. */
  99. #ifdef HAL_CAN_MODULE_ENABLED
  100. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  101. defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  102. defined(STM32F446xx)
  103. /* Private typedef -----------------------------------------------------------*/
  104. /* Private define ------------------------------------------------------------*/
  105. /** @addtogroup CAN_Private_Constants
  106. * @{
  107. */
  108. #define CAN_TIMEOUT_VALUE 10
  109. /**
  110. * @}
  111. */
  112. /* Private macro -------------------------------------------------------------*/
  113. /* Private variables ---------------------------------------------------------*/
  114. /* Private function prototypes -----------------------------------------------*/
  115. /** @addtogroup CAN_Private_Functions
  116. * @{
  117. */
  118. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
  119. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
  120. /**
  121. * @}
  122. */
  123. /* Exported functions --------------------------------------------------------*/
  124. /** @defgroup CAN_Exported_Functions CAN Exported Functions
  125. * @{
  126. */
  127. /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
  128. * @brief Initialization and Configuration functions
  129. *
  130. @verbatim
  131. ==============================================================================
  132. ##### Initialization and de-initialization functions #####
  133. ==============================================================================
  134. [..] This section provides functions allowing to:
  135. (+) Initialize and configure the CAN.
  136. (+) De-initialize the CAN.
  137. @endverbatim
  138. * @{
  139. */
  140. /**
  141. * @brief Initializes the CAN peripheral according to the specified
  142. * parameters in the CAN_InitStruct.
  143. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  144. * the configuration information for the specified CAN.
  145. * @retval HAL status
  146. */
  147. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
  148. {
  149. uint32_t InitStatus = 3;
  150. uint32_t tickstart = 0;
  151. /* Check CAN handle */
  152. if(hcan == NULL)
  153. {
  154. return HAL_ERROR;
  155. }
  156. /* Check the parameters */
  157. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  158. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
  159. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
  160. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
  161. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
  162. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
  163. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
  164. assert_param(IS_CAN_MODE(hcan->Init.Mode));
  165. assert_param(IS_CAN_SJW(hcan->Init.SJW));
  166. assert_param(IS_CAN_BS1(hcan->Init.BS1));
  167. assert_param(IS_CAN_BS2(hcan->Init.BS2));
  168. assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
  169. if(hcan->State == HAL_CAN_STATE_RESET)
  170. {
  171. /* Allocate lock resource and initialize it */
  172. hcan->Lock = HAL_UNLOCKED;
  173. /* Init the low level hardware */
  174. HAL_CAN_MspInit(hcan);
  175. }
  176. /* Initialize the CAN state*/
  177. hcan->State = HAL_CAN_STATE_BUSY;
  178. /* Exit from sleep mode */
  179. hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
  180. /* Request initialisation */
  181. hcan->Instance->MCR |= CAN_MCR_INRQ ;
  182. /* Get tick */
  183. tickstart = HAL_GetTick();
  184. /* Wait the acknowledge */
  185. while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  186. {
  187. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  188. {
  189. hcan->State= HAL_CAN_STATE_TIMEOUT;
  190. /* Process unlocked */
  191. __HAL_UNLOCK(hcan);
  192. return HAL_TIMEOUT;
  193. }
  194. }
  195. /* Check acknowledge */
  196. if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  197. {
  198. InitStatus = CAN_INITSTATUS_FAILED;
  199. }
  200. else
  201. {
  202. /* Set the time triggered communication mode */
  203. if (hcan->Init.TTCM == ENABLE)
  204. {
  205. hcan->Instance->MCR |= CAN_MCR_TTCM;
  206. }
  207. else
  208. {
  209. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM;
  210. }
  211. /* Set the automatic bus-off management */
  212. if (hcan->Init.ABOM == ENABLE)
  213. {
  214. hcan->Instance->MCR |= CAN_MCR_ABOM;
  215. }
  216. else
  217. {
  218. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM;
  219. }
  220. /* Set the automatic wake-up mode */
  221. if (hcan->Init.AWUM == ENABLE)
  222. {
  223. hcan->Instance->MCR |= CAN_MCR_AWUM;
  224. }
  225. else
  226. {
  227. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM;
  228. }
  229. /* Set the no automatic retransmission */
  230. if (hcan->Init.NART == ENABLE)
  231. {
  232. hcan->Instance->MCR |= CAN_MCR_NART;
  233. }
  234. else
  235. {
  236. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART;
  237. }
  238. /* Set the receive FIFO locked mode */
  239. if (hcan->Init.RFLM == ENABLE)
  240. {
  241. hcan->Instance->MCR |= CAN_MCR_RFLM;
  242. }
  243. else
  244. {
  245. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM;
  246. }
  247. /* Set the transmit FIFO priority */
  248. if (hcan->Init.TXFP == ENABLE)
  249. {
  250. hcan->Instance->MCR |= CAN_MCR_TXFP;
  251. }
  252. else
  253. {
  254. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP;
  255. }
  256. /* Set the bit timing register */
  257. hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \
  258. ((uint32_t)hcan->Init.SJW) | \
  259. ((uint32_t)hcan->Init.BS1) | \
  260. ((uint32_t)hcan->Init.BS2) | \
  261. ((uint32_t)hcan->Init.Prescaler - 1);
  262. /* Request leave initialisation */
  263. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ;
  264. /* Get tick */
  265. tickstart = HAL_GetTick();
  266. /* Wait the acknowledge */
  267. while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  268. {
  269. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  270. {
  271. hcan->State= HAL_CAN_STATE_TIMEOUT;
  272. /* Process unlocked */
  273. __HAL_UNLOCK(hcan);
  274. return HAL_TIMEOUT;
  275. }
  276. }
  277. /* Check acknowledged */
  278. if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  279. {
  280. InitStatus = CAN_INITSTATUS_FAILED;
  281. }
  282. else
  283. {
  284. InitStatus = CAN_INITSTATUS_SUCCESS;
  285. }
  286. }
  287. if(InitStatus == CAN_INITSTATUS_SUCCESS)
  288. {
  289. /* Set CAN error code to none */
  290. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  291. /* Initialize the CAN state */
  292. hcan->State = HAL_CAN_STATE_READY;
  293. /* Return function status */
  294. return HAL_OK;
  295. }
  296. else
  297. {
  298. /* Initialize the CAN state */
  299. hcan->State = HAL_CAN_STATE_ERROR;
  300. /* Return function status */
  301. return HAL_ERROR;
  302. }
  303. }
  304. /**
  305. * @brief Configures the CAN reception filter according to the specified
  306. * parameters in the CAN_FilterInitStruct.
  307. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  308. * the configuration information for the specified CAN.
  309. * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that
  310. * contains the filter configuration information.
  311. * @retval None
  312. */
  313. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
  314. {
  315. uint32_t filternbrbitpos = 0;
  316. /* Check the parameters */
  317. assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
  318. assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
  319. assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
  320. assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
  321. assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
  322. assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
  323. filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber;
  324. /* Initialisation mode for the filter */
  325. CAN1->FMR |= (uint32_t)CAN_FMR_FINIT;
  326. /* Select the start slave bank */
  327. CAN1->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
  328. CAN1->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
  329. /* Filter Deactivation */
  330. CAN1->FA1R &= ~(uint32_t)filternbrbitpos;
  331. /* Filter Scale */
  332. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
  333. {
  334. /* 16-bit scale for the filter */
  335. CAN1->FS1R &= ~(uint32_t)filternbrbitpos;
  336. /* First 16-bit identifier and First 16-bit mask */
  337. /* Or First 16-bit identifier and Second 16-bit identifier */
  338. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  339. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) |
  340. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  341. /* Second 16-bit identifier and Second 16-bit mask */
  342. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  343. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  344. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  345. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh);
  346. }
  347. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
  348. {
  349. /* 32-bit scale for the filter */
  350. CAN1->FS1R |= filternbrbitpos;
  351. /* 32-bit identifier or First 32-bit identifier */
  352. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  353. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) |
  354. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  355. /* 32-bit mask or Second 32-bit identifier */
  356. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  357. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  358. (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow);
  359. }
  360. /* Filter Mode */
  361. if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
  362. {
  363. /*Id/Mask mode for the filter*/
  364. CAN1->FM1R &= ~(uint32_t)filternbrbitpos;
  365. }
  366. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  367. {
  368. /*Identifier list mode for the filter*/
  369. CAN1->FM1R |= (uint32_t)filternbrbitpos;
  370. }
  371. /* Filter FIFO assignment */
  372. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
  373. {
  374. /* FIFO 0 assignation for the filter */
  375. CAN1->FFA1R &= ~(uint32_t)filternbrbitpos;
  376. }
  377. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1)
  378. {
  379. /* FIFO 1 assignation for the filter */
  380. CAN1->FFA1R |= (uint32_t)filternbrbitpos;
  381. }
  382. /* Filter activation */
  383. if (sFilterConfig->FilterActivation == ENABLE)
  384. {
  385. CAN1->FA1R |= filternbrbitpos;
  386. }
  387. /* Leave the initialisation mode for the filter */
  388. CAN1->FMR &= ~((uint32_t)CAN_FMR_FINIT);
  389. /* Return function status */
  390. return HAL_OK;
  391. }
  392. /**
  393. * @brief Deinitializes the CANx peripheral registers to their default reset values.
  394. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  395. * the configuration information for the specified CAN.
  396. * @retval HAL status
  397. */
  398. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
  399. {
  400. /* Check CAN handle */
  401. if(hcan == NULL)
  402. {
  403. return HAL_ERROR;
  404. }
  405. /* Check the parameters */
  406. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  407. /* Change CAN state */
  408. hcan->State = HAL_CAN_STATE_BUSY;
  409. /* DeInit the low level hardware */
  410. HAL_CAN_MspDeInit(hcan);
  411. /* Change CAN state */
  412. hcan->State = HAL_CAN_STATE_RESET;
  413. /* Release Lock */
  414. __HAL_UNLOCK(hcan);
  415. /* Return function status */
  416. return HAL_OK;
  417. }
  418. /**
  419. * @brief Initializes the CAN MSP.
  420. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  421. * the configuration information for the specified CAN.
  422. * @retval None
  423. */
  424. __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
  425. {
  426. /* NOTE : This function Should not be modified, when the callback is needed,
  427. the HAL_CAN_MspInit could be implemented in the user file
  428. */
  429. }
  430. /**
  431. * @brief DeInitializes the CAN MSP.
  432. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  433. * the configuration information for the specified CAN.
  434. * @retval None
  435. */
  436. __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
  437. {
  438. /* NOTE : This function Should not be modified, when the callback is needed,
  439. the HAL_CAN_MspDeInit could be implemented in the user file
  440. */
  441. }
  442. /**
  443. * @}
  444. */
  445. /** @defgroup CAN_Exported_Functions_Group2 IO operation functions
  446. * @brief IO operation functions
  447. *
  448. @verbatim
  449. ==============================================================================
  450. ##### IO operation functions #####
  451. ==============================================================================
  452. [..] This section provides functions allowing to:
  453. (+) Transmit a CAN frame message.
  454. (+) Receive a CAN frame message.
  455. (+) Enter CAN peripheral in sleep mode.
  456. (+) Wake up the CAN peripheral from sleep mode.
  457. @endverbatim
  458. * @{
  459. */
  460. /**
  461. * @brief Initiates and transmits a CAN frame message.
  462. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  463. * the configuration information for the specified CAN.
  464. * @param Timeout: Specify Timeout value
  465. * @retval HAL status
  466. */
  467. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
  468. {
  469. uint32_t transmitmailbox = 5;
  470. uint32_t tickstart = 0;
  471. /* Check the parameters */
  472. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  473. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  474. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  475. /* Process locked */
  476. __HAL_LOCK(hcan);
  477. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  478. {
  479. /* Change CAN state */
  480. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  481. }
  482. else
  483. {
  484. /* Change CAN state */
  485. hcan->State = HAL_CAN_STATE_BUSY_TX;
  486. }
  487. /* Select one empty transmit mailbox */
  488. if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  489. {
  490. transmitmailbox = 0;
  491. }
  492. else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  493. {
  494. transmitmailbox = 1;
  495. }
  496. else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  497. {
  498. transmitmailbox = 2;
  499. }
  500. else
  501. {
  502. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  503. }
  504. if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  505. {
  506. /* Set up the Id */
  507. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  508. if (hcan->pTxMsg->IDE == CAN_ID_STD)
  509. {
  510. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  511. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  512. hcan->pTxMsg->RTR);
  513. }
  514. else
  515. {
  516. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  517. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  518. hcan->pTxMsg->IDE | \
  519. hcan->pTxMsg->RTR);
  520. }
  521. /* Set up the DLC */
  522. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  523. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  524. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  525. /* Set up the data field */
  526. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  527. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  528. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  529. ((uint32_t)hcan->pTxMsg->Data[0]));
  530. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  531. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  532. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  533. ((uint32_t)hcan->pTxMsg->Data[4]));
  534. /* Request transmission */
  535. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  536. /* Get tick */
  537. tickstart = HAL_GetTick();
  538. /* Check End of transmission flag */
  539. while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
  540. {
  541. /* Check for the Timeout */
  542. if(Timeout != HAL_MAX_DELAY)
  543. {
  544. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  545. {
  546. hcan->State = HAL_CAN_STATE_TIMEOUT;
  547. /* Process unlocked */
  548. __HAL_UNLOCK(hcan);
  549. return HAL_TIMEOUT;
  550. }
  551. }
  552. }
  553. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  554. {
  555. /* Change CAN state */
  556. hcan->State = HAL_CAN_STATE_BUSY_RX;
  557. /* Process unlocked */
  558. __HAL_UNLOCK(hcan);
  559. }
  560. else
  561. {
  562. /* Change CAN state */
  563. hcan->State = HAL_CAN_STATE_READY;
  564. /* Process unlocked */
  565. __HAL_UNLOCK(hcan);
  566. }
  567. /* Return function status */
  568. return HAL_OK;
  569. }
  570. else
  571. {
  572. /* Change CAN state */
  573. hcan->State = HAL_CAN_STATE_ERROR;
  574. /* Process unlocked */
  575. __HAL_UNLOCK(hcan);
  576. /* Return function status */
  577. return HAL_ERROR;
  578. }
  579. }
  580. /**
  581. * @brief Initiates and transmits a CAN frame message.
  582. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  583. * the configuration information for the specified CAN.
  584. * @retval HAL status
  585. */
  586. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  587. {
  588. uint32_t transmitmailbox = 5;
  589. uint32_t tmp = 0;
  590. /* Check the parameters */
  591. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  592. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  593. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  594. tmp = hcan->State;
  595. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_RX))
  596. {
  597. /* Process Locked */
  598. __HAL_LOCK(hcan);
  599. /* Select one empty transmit mailbox */
  600. if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  601. {
  602. transmitmailbox = 0;
  603. }
  604. else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  605. {
  606. transmitmailbox = 1;
  607. }
  608. else if((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  609. {
  610. transmitmailbox = 2;
  611. }
  612. else
  613. {
  614. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  615. }
  616. if(transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  617. {
  618. /* Set up the Id */
  619. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  620. if(hcan->pTxMsg->IDE == CAN_ID_STD)
  621. {
  622. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  623. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  624. hcan->pTxMsg->RTR);
  625. }
  626. else
  627. {
  628. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  629. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  630. hcan->pTxMsg->IDE | \
  631. hcan->pTxMsg->RTR);
  632. }
  633. /* Set up the DLC */
  634. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  635. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  636. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  637. /* Set up the data field */
  638. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  639. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  640. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  641. ((uint32_t)hcan->pTxMsg->Data[0]));
  642. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  643. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  644. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  645. ((uint32_t)hcan->pTxMsg->Data[4]));
  646. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  647. {
  648. /* Change CAN state */
  649. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  650. }
  651. else
  652. {
  653. /* Change CAN state */
  654. hcan->State = HAL_CAN_STATE_BUSY_TX;
  655. }
  656. /* Set CAN error code to none */
  657. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  658. /* Process Unlocked */
  659. __HAL_UNLOCK(hcan);
  660. /* Enable Error warning Interrupt */
  661. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  662. /* Enable Error passive Interrupt */
  663. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  664. /* Enable Bus-off Interrupt */
  665. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  666. /* Enable Last error code Interrupt */
  667. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  668. /* Enable Error Interrupt */
  669. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  670. /* Enable Transmit mailbox empty Interrupt */
  671. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_TME);
  672. /* Request transmission */
  673. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  674. }
  675. }
  676. else
  677. {
  678. return HAL_BUSY;
  679. }
  680. return HAL_OK;
  681. }
  682. /**
  683. * @brief Receives a correct CAN frame.
  684. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  685. * the configuration information for the specified CAN.
  686. * @param FIFONumber: FIFO Number value
  687. * @param Timeout: Specify Timeout value
  688. * @retval HAL status
  689. */
  690. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
  691. {
  692. uint32_t tickstart = 0;
  693. /* Check the parameters */
  694. assert_param(IS_CAN_FIFO(FIFONumber));
  695. /* Process locked */
  696. __HAL_LOCK(hcan);
  697. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  698. {
  699. /* Change CAN state */
  700. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  701. }
  702. else
  703. {
  704. /* Change CAN state */
  705. hcan->State = HAL_CAN_STATE_BUSY_RX;
  706. }
  707. /* Get tick */
  708. tickstart = HAL_GetTick();
  709. /* Check pending message */
  710. while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0)
  711. {
  712. /* Check for the Timeout */
  713. if(Timeout != HAL_MAX_DELAY)
  714. {
  715. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  716. {
  717. hcan->State = HAL_CAN_STATE_TIMEOUT;
  718. /* Process unlocked */
  719. __HAL_UNLOCK(hcan);
  720. return HAL_TIMEOUT;
  721. }
  722. }
  723. }
  724. /* Get the Id */
  725. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  726. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  727. {
  728. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  729. }
  730. else
  731. {
  732. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  733. }
  734. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  735. /* Get the DLC */
  736. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  737. /* Get the FMI */
  738. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  739. /* Get the data field */
  740. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  741. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  742. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  743. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  744. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  745. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  746. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  747. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  748. /* Release the FIFO */
  749. if(FIFONumber == CAN_FIFO0)
  750. {
  751. /* Release FIFO0 */
  752. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  753. }
  754. else /* FIFONumber == CAN_FIFO1 */
  755. {
  756. /* Release FIFO1 */
  757. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  758. }
  759. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  760. {
  761. /* Change CAN state */
  762. hcan->State = HAL_CAN_STATE_BUSY_TX;
  763. /* Process unlocked */
  764. __HAL_UNLOCK(hcan);
  765. }
  766. else
  767. {
  768. /* Change CAN state */
  769. hcan->State = HAL_CAN_STATE_READY;
  770. /* Process unlocked */
  771. __HAL_UNLOCK(hcan);
  772. }
  773. /* Return function status */
  774. return HAL_OK;
  775. }
  776. /**
  777. * @brief Receives a correct CAN frame.
  778. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  779. * the configuration information for the specified CAN.
  780. * @param FIFONumber: Specify the FIFO number
  781. * @retval HAL status
  782. */
  783. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  784. {
  785. uint32_t tmp = 0;
  786. /* Check the parameters */
  787. assert_param(IS_CAN_FIFO(FIFONumber));
  788. tmp = hcan->State;
  789. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_TX))
  790. {
  791. /* Process locked */
  792. __HAL_LOCK(hcan);
  793. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  794. {
  795. /* Change CAN state */
  796. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  797. }
  798. else
  799. {
  800. /* Change CAN state */
  801. hcan->State = HAL_CAN_STATE_BUSY_RX;
  802. }
  803. /* Set CAN error code to none */
  804. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  805. /* Enable Error warning Interrupt */
  806. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  807. /* Enable Error passive Interrupt */
  808. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  809. /* Enable Bus-off Interrupt */
  810. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  811. /* Enable Last error code Interrupt */
  812. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  813. /* Enable Error Interrupt */
  814. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  815. /* Process unlocked */
  816. __HAL_UNLOCK(hcan);
  817. if(FIFONumber == CAN_FIFO0)
  818. {
  819. /* Enable FIFO 0 message pending Interrupt */
  820. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0);
  821. }
  822. else
  823. {
  824. /* Enable FIFO 1 message pending Interrupt */
  825. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1);
  826. }
  827. }
  828. else
  829. {
  830. return HAL_BUSY;
  831. }
  832. /* Return function status */
  833. return HAL_OK;
  834. }
  835. /**
  836. * @brief Enters the Sleep (low power) mode.
  837. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  838. * the configuration information for the specified CAN.
  839. * @retval HAL status.
  840. */
  841. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
  842. {
  843. uint32_t tickstart = 0;
  844. /* Process locked */
  845. __HAL_LOCK(hcan);
  846. /* Change CAN state */
  847. hcan->State = HAL_CAN_STATE_BUSY;
  848. /* Request Sleep mode */
  849. hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  850. /* Sleep mode status */
  851. if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  852. {
  853. /* Process unlocked */
  854. __HAL_UNLOCK(hcan);
  855. /* Return function status */
  856. return HAL_ERROR;
  857. }
  858. /* Get tick */
  859. tickstart = HAL_GetTick();
  860. /* Wait the acknowledge */
  861. while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  862. {
  863. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  864. {
  865. hcan->State = HAL_CAN_STATE_TIMEOUT;
  866. /* Process unlocked */
  867. __HAL_UNLOCK(hcan);
  868. return HAL_TIMEOUT;
  869. }
  870. }
  871. /* Change CAN state */
  872. hcan->State = HAL_CAN_STATE_READY;
  873. /* Process unlocked */
  874. __HAL_UNLOCK(hcan);
  875. /* Return function status */
  876. return HAL_OK;
  877. }
  878. /**
  879. * @brief Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
  880. * is in the normal mode.
  881. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  882. * the configuration information for the specified CAN.
  883. * @retval HAL status.
  884. */
  885. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
  886. {
  887. uint32_t tickstart = 0;
  888. /* Process locked */
  889. __HAL_LOCK(hcan);
  890. /* Change CAN state */
  891. hcan->State = HAL_CAN_STATE_BUSY;
  892. /* Wake up request */
  893. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
  894. /* Get tick */
  895. tickstart = HAL_GetTick();
  896. /* Sleep mode status */
  897. while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  898. {
  899. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  900. {
  901. hcan->State= HAL_CAN_STATE_TIMEOUT;
  902. /* Process unlocked */
  903. __HAL_UNLOCK(hcan);
  904. return HAL_TIMEOUT;
  905. }
  906. }
  907. if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  908. {
  909. /* Process unlocked */
  910. __HAL_UNLOCK(hcan);
  911. /* Return function status */
  912. return HAL_ERROR;
  913. }
  914. /* Change CAN state */
  915. hcan->State = HAL_CAN_STATE_READY;
  916. /* Process unlocked */
  917. __HAL_UNLOCK(hcan);
  918. /* Return function status */
  919. return HAL_OK;
  920. }
  921. /**
  922. * @brief Handles CAN interrupt request
  923. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  924. * the configuration information for the specified CAN.
  925. * @retval None
  926. */
  927. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
  928. {
  929. uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
  930. /* Check End of transmission flag */
  931. if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
  932. {
  933. tmp1 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0);
  934. tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1);
  935. tmp3 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2);
  936. if(tmp1 || tmp2 || tmp3)
  937. {
  938. /* Call transmit function */
  939. CAN_Transmit_IT(hcan);
  940. }
  941. }
  942. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0);
  943. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0);
  944. /* Check End of reception flag for FIFO0 */
  945. if((tmp1 != 0) && tmp2)
  946. {
  947. /* Call receive function */
  948. CAN_Receive_IT(hcan, CAN_FIFO0);
  949. }
  950. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1);
  951. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1);
  952. /* Check End of reception flag for FIFO1 */
  953. if((tmp1 != 0) && tmp2)
  954. {
  955. /* Call receive function */
  956. CAN_Receive_IT(hcan, CAN_FIFO1);
  957. }
  958. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG);
  959. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG);
  960. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  961. /* Check Error Warning Flag */
  962. if(tmp1 && tmp2 && tmp3)
  963. {
  964. /* Set CAN error code to EWG error */
  965. hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
  966. /* Clear Error Warning Flag */
  967. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_EWG);
  968. }
  969. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV);
  970. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV);
  971. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  972. /* Check Error Passive Flag */
  973. if(tmp1 && tmp2 && tmp3)
  974. {
  975. /* Set CAN error code to EPV error */
  976. hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
  977. /* Clear Error Passive Flag */
  978. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_EPV);
  979. }
  980. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF);
  981. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF);
  982. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  983. /* Check Bus-Off Flag */
  984. if(tmp1 && tmp2 && tmp3)
  985. {
  986. /* Set CAN error code to BOF error */
  987. hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
  988. /* Clear Bus-Off Flag */
  989. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_BOF);
  990. }
  991. tmp1 = HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC);
  992. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC);
  993. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  994. /* Check Last error code Flag */
  995. if((!tmp1) && tmp2 && tmp3)
  996. {
  997. tmp1 = (hcan->Instance->ESR) & CAN_ESR_LEC;
  998. switch(tmp1)
  999. {
  1000. case(CAN_ESR_LEC_0):
  1001. /* Set CAN error code to STF error */
  1002. hcan->ErrorCode |= HAL_CAN_ERROR_STF;
  1003. break;
  1004. case(CAN_ESR_LEC_1):
  1005. /* Set CAN error code to FOR error */
  1006. hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
  1007. break;
  1008. case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
  1009. /* Set CAN error code to ACK error */
  1010. hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
  1011. break;
  1012. case(CAN_ESR_LEC_2):
  1013. /* Set CAN error code to BR error */
  1014. hcan->ErrorCode |= HAL_CAN_ERROR_BR;
  1015. break;
  1016. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
  1017. /* Set CAN error code to BD error */
  1018. hcan->ErrorCode |= HAL_CAN_ERROR_BD;
  1019. break;
  1020. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
  1021. /* Set CAN error code to CRC error */
  1022. hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
  1023. break;
  1024. default:
  1025. break;
  1026. }
  1027. /* Clear Last error code Flag */
  1028. hcan->Instance->ESR &= ~(CAN_ESR_LEC);
  1029. }
  1030. /* Call the Error call Back in case of Errors */
  1031. if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
  1032. {
  1033. /* Set the CAN state ready to be able to start again the process */
  1034. hcan->State = HAL_CAN_STATE_READY;
  1035. /* Call Error callback function */
  1036. HAL_CAN_ErrorCallback(hcan);
  1037. }
  1038. }
  1039. /**
  1040. * @brief Transmission complete callback in non blocking mode
  1041. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1042. * the configuration information for the specified CAN.
  1043. * @retval None
  1044. */
  1045. __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
  1046. {
  1047. /* NOTE : This function Should not be modified, when the callback is needed,
  1048. the HAL_CAN_TxCpltCallback could be implemented in the user file
  1049. */
  1050. }
  1051. /**
  1052. * @brief Transmission complete callback in non blocking mode
  1053. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1054. * the configuration information for the specified CAN.
  1055. * @retval None
  1056. */
  1057. __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
  1058. {
  1059. /* NOTE : This function Should not be modified, when the callback is needed,
  1060. the HAL_CAN_RxCpltCallback could be implemented in the user file
  1061. */
  1062. }
  1063. /**
  1064. * @brief Error CAN callback.
  1065. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1066. * the configuration information for the specified CAN.
  1067. * @retval None
  1068. */
  1069. __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
  1070. {
  1071. /* NOTE : This function Should not be modified, when the callback is needed,
  1072. the HAL_CAN_ErrorCallback could be implemented in the user file
  1073. */
  1074. }
  1075. /**
  1076. * @}
  1077. */
  1078. /** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
  1079. * @brief CAN Peripheral State functions
  1080. *
  1081. @verbatim
  1082. ==============================================================================
  1083. ##### Peripheral State and Error functions #####
  1084. ==============================================================================
  1085. [..]
  1086. This subsection provides functions allowing to :
  1087. (+) Check the CAN state.
  1088. (+) Check CAN Errors detected during interrupt process
  1089. @endverbatim
  1090. * @{
  1091. */
  1092. /**
  1093. * @brief return the CAN state
  1094. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1095. * the configuration information for the specified CAN.
  1096. * @retval HAL state
  1097. */
  1098. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
  1099. {
  1100. /* Return CAN state */
  1101. return hcan->State;
  1102. }
  1103. /**
  1104. * @brief Return the CAN error code
  1105. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1106. * the configuration information for the specified CAN.
  1107. * @retval CAN Error Code
  1108. */
  1109. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
  1110. {
  1111. return hcan->ErrorCode;
  1112. }
  1113. /**
  1114. * @}
  1115. */
  1116. /**
  1117. * @brief Initiates and transmits a CAN frame message.
  1118. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1119. * the configuration information for the specified CAN.
  1120. * @retval HAL status
  1121. */
  1122. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  1123. {
  1124. /* Disable Transmit mailbox empty Interrupt */
  1125. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
  1126. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  1127. {
  1128. /* Disable Error warning Interrupt */
  1129. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1130. /* Disable Error passive Interrupt */
  1131. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1132. /* Disable Bus-off Interrupt */
  1133. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1134. /* Disable Last error code Interrupt */
  1135. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1136. /* Disable Error Interrupt */
  1137. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1138. }
  1139. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1140. {
  1141. /* Change CAN state */
  1142. hcan->State = HAL_CAN_STATE_BUSY_RX;
  1143. }
  1144. else
  1145. {
  1146. /* Change CAN state */
  1147. hcan->State = HAL_CAN_STATE_READY;
  1148. }
  1149. /* Transmission complete callback */
  1150. HAL_CAN_TxCpltCallback(hcan);
  1151. return HAL_OK;
  1152. }
  1153. /**
  1154. * @brief Receives a correct CAN frame.
  1155. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  1156. * the configuration information for the specified CAN.
  1157. * @param FIFONumber: Specify the FIFO number
  1158. * @retval HAL status
  1159. * @retval None
  1160. */
  1161. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  1162. {
  1163. /* Get the Id */
  1164. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1165. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  1166. {
  1167. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  1168. }
  1169. else
  1170. {
  1171. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  1172. }
  1173. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1174. /* Get the DLC */
  1175. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  1176. /* Get the FMI */
  1177. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  1178. /* Get the data field */
  1179. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  1180. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  1181. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  1182. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  1183. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  1184. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  1185. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  1186. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  1187. /* Release the FIFO */
  1188. /* Release FIFO0 */
  1189. if (FIFONumber == CAN_FIFO0)
  1190. {
  1191. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  1192. /* Disable FIFO 0 message pending Interrupt */
  1193. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0);
  1194. }
  1195. /* Release FIFO1 */
  1196. else /* FIFONumber == CAN_FIFO1 */
  1197. {
  1198. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  1199. /* Disable FIFO 1 message pending Interrupt */
  1200. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1);
  1201. }
  1202. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  1203. {
  1204. /* Disable Error warning Interrupt */
  1205. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1206. /* Disable Error passive Interrupt */
  1207. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1208. /* Disable Bus-off Interrupt */
  1209. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1210. /* Disable Last error code Interrupt */
  1211. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1212. /* Disable Error Interrupt */
  1213. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1214. }
  1215. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1216. {
  1217. /* Disable CAN state */
  1218. hcan->State = HAL_CAN_STATE_BUSY_TX;
  1219. }
  1220. else
  1221. {
  1222. /* Change CAN state */
  1223. hcan->State = HAL_CAN_STATE_READY;
  1224. }
  1225. /* Receive complete callback */
  1226. HAL_CAN_RxCpltCallback(hcan);
  1227. /* Return function status */
  1228. return HAL_OK;
  1229. }
  1230. /**
  1231. * @}
  1232. */
  1233. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
  1234. #endif /* HAL_CAN_MODULE_ENABLED */
  1235. /**
  1236. * @}
  1237. */
  1238. /**
  1239. * @}
  1240. */
  1241. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/