stm32f4xx_hal_dma2d.c 41 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_dma2d.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief DMA2D HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the DMA2D peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Errors functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. (#) Program the required configuration through following parameters:
  21. the Transfer Mode, the output color mode and the output offset using
  22. HAL_DMA2D_Init() function.
  23. (#) Program the required configuration through following parameters:
  24. the input color mode, the input color, input alpha value, alpha mode
  25. and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
  26. or/and background layer.
  27. *** Polling mode IO operation ***
  28. =================================
  29. [..]
  30. (+) Configure the pdata, Destination and data length and Enable
  31. the transfer using HAL_DMA2D_Start()
  32. (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
  33. user can specify the value of timeout according to his end application.
  34. *** Interrupt mode IO operation ***
  35. ===================================
  36. [..]
  37. (#) Configure the pdata, Destination and data length and Enable
  38. the transfer using HAL_DMA2D_Start_IT()
  39. (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
  40. (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
  41. add his own function by customization of function pointer XferCpltCallback and
  42. XferErrorCallback (i.e a member of DMA2D handle structure).
  43. -@- In Register-to-Memory transfer mode, the pdata parameter is the register
  44. color, in Memory-to-memory or memory-to-memory with pixel format
  45. conversion the pdata is the source address.
  46. -@- Configure the foreground source address, the background source address,
  47. the Destination and data length and Enable the transfer using
  48. HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
  49. in interrupt mode.
  50. -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
  51. are used if the memory to memory with blending transfer mode is selected.
  52. (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
  53. HAL_DMA2D_EnableCLUT() functions.
  54. (#) Optionally, configure and enable LineInterrupt using the following function:
  55. HAL_DMA2D_ProgramLineEvent().
  56. (#) The transfer can be suspended, continued and aborted using the following
  57. functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
  58. (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
  59. *** DMA2D HAL driver macros list ***
  60. =============================================
  61. [..]
  62. Below the list of most used macros in DMA2D HAL driver :
  63. (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
  64. (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
  65. (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
  66. (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
  67. (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
  68. (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
  69. (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
  70. [..]
  71. (@) You can refer to the DMA2D HAL driver header file for more useful macros
  72. @endverbatim
  73. ******************************************************************************
  74. * @attention
  75. *
  76. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  77. *
  78. * Redistribution and use in source and binary forms, with or without modification,
  79. * are permitted provided that the following conditions are met:
  80. * 1. Redistributions of source code must retain the above copyright notice,
  81. * this list of conditions and the following disclaimer.
  82. * 2. Redistributions in binary form must reproduce the above copyright notice,
  83. * this list of conditions and the following disclaimer in the documentation
  84. * and/or other materials provided with the distribution.
  85. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  86. * may be used to endorse or promote products derived from this software
  87. * without specific prior written permission.
  88. *
  89. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  90. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  91. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  92. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  93. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  94. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  95. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  96. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  97. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  98. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  99. *
  100. ******************************************************************************
  101. */
  102. /* Includes ------------------------------------------------------------------*/
  103. #include "stm32f4xx_hal.h"
  104. /** @addtogroup STM32F4xx_HAL_Driver
  105. * @{
  106. */
  107. /** @addtogroup DMA2D
  108. * @brief DMA2D HAL module driver
  109. * @{
  110. */
  111. #ifdef HAL_DMA2D_MODULE_ENABLED
  112. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
  113. /* Private types -------------------------------------------------------------*/
  114. /* Private define ------------------------------------------------------------*/
  115. /** @addtogroup DMA2D_Private_Defines
  116. * @{
  117. */
  118. #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
  119. #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
  120. /**
  121. * @}
  122. */
  123. /* Private variables ---------------------------------------------------------*/
  124. /* Private constants ---------------------------------------------------------*/
  125. /* Private macro -------------------------------------------------------------*/
  126. /* Private function prototypes -----------------------------------------------*/
  127. /** @addtogroup DMA2D_Private_Functions_Prototypes
  128. * @{
  129. */
  130. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  131. /**
  132. * @}
  133. */
  134. /* Private functions ---------------------------------------------------------*/
  135. /* Exported functions --------------------------------------------------------*/
  136. /** @addtogroup DMA2D_Exported_Functions
  137. * @{
  138. */
  139. /** @defgroup DMA2D_Group1 Initialization and Configuration functions
  140. * @brief Initialization and Configuration functions
  141. *
  142. @verbatim
  143. ===============================================================================
  144. ##### Initialization and Configuration functions #####
  145. ===============================================================================
  146. [..] This section provides functions allowing to:
  147. (+) Initialize and configure the DMA2D
  148. (+) De-initialize the DMA2D
  149. @endverbatim
  150. * @{
  151. */
  152. /**
  153. * @brief Initializes the DMA2D according to the specified
  154. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  155. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  156. * the configuration information for the DMA2D.
  157. * @retval HAL status
  158. */
  159. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
  160. {
  161. uint32_t tmp = 0;
  162. /* Check the DMA2D peripheral state */
  163. if(hdma2d == NULL)
  164. {
  165. return HAL_ERROR;
  166. }
  167. /* Check the parameters */
  168. assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
  169. assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
  170. assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
  171. assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
  172. if(hdma2d->State == HAL_DMA2D_STATE_RESET)
  173. {
  174. /* Allocate lock resource and initialize it */
  175. hdma2d->Lock = HAL_UNLOCKED;
  176. /* Init the low level hardware */
  177. HAL_DMA2D_MspInit(hdma2d);
  178. }
  179. /* Change DMA2D peripheral state */
  180. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  181. /* DMA2D CR register configuration -------------------------------------------*/
  182. /* Get the CR register value */
  183. tmp = hdma2d->Instance->CR;
  184. /* Clear Mode bits */
  185. tmp &= (uint32_t)~DMA2D_CR_MODE;
  186. /* Prepare the value to be wrote to the CR register */
  187. tmp |= hdma2d->Init.Mode;
  188. /* Write to DMA2D CR register */
  189. hdma2d->Instance->CR = tmp;
  190. /* DMA2D OPFCCR register configuration ---------------------------------------*/
  191. /* Get the OPFCCR register value */
  192. tmp = hdma2d->Instance->OPFCCR;
  193. /* Clear Color Mode bits */
  194. tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
  195. /* Prepare the value to be wrote to the OPFCCR register */
  196. tmp |= hdma2d->Init.ColorMode;
  197. /* Write to DMA2D OPFCCR register */
  198. hdma2d->Instance->OPFCCR = tmp;
  199. /* DMA2D OOR register configuration ------------------------------------------*/
  200. /* Get the OOR register value */
  201. tmp = hdma2d->Instance->OOR;
  202. /* Clear Offset bits */
  203. tmp &= (uint32_t)~DMA2D_OOR_LO;
  204. /* Prepare the value to be wrote to the OOR register */
  205. tmp |= hdma2d->Init.OutputOffset;
  206. /* Write to DMA2D OOR register */
  207. hdma2d->Instance->OOR = tmp;
  208. /* Update error code */
  209. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  210. /* Initialize the DMA2D state*/
  211. hdma2d->State = HAL_DMA2D_STATE_READY;
  212. return HAL_OK;
  213. }
  214. /**
  215. * @brief Deinitializes the DMA2D peripheral registers to their default reset
  216. * values.
  217. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  218. * the configuration information for the DMA2D.
  219. * @retval None
  220. */
  221. HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
  222. {
  223. /* Check the DMA2D peripheral state */
  224. if(hdma2d == NULL)
  225. {
  226. return HAL_ERROR;
  227. }
  228. /* DeInit the low level hardware */
  229. HAL_DMA2D_MspDeInit(hdma2d);
  230. /* Update error code */
  231. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  232. /* Initialize the DMA2D state*/
  233. hdma2d->State = HAL_DMA2D_STATE_RESET;
  234. /* Release Lock */
  235. __HAL_UNLOCK(hdma2d);
  236. return HAL_OK;
  237. }
  238. /**
  239. * @brief Initializes the DMA2D MSP.
  240. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  241. * the configuration information for the DMA2D.
  242. * @retval None
  243. */
  244. __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
  245. {
  246. /* NOTE : This function Should not be modified, when the callback is needed,
  247. the HAL_DMA2D_MspInit could be implemented in the user file
  248. */
  249. }
  250. /**
  251. * @brief DeInitializes the DMA2D MSP.
  252. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  253. * the configuration information for the DMA2D.
  254. * @retval None
  255. */
  256. __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
  257. {
  258. /* NOTE : This function Should not be modified, when the callback is needed,
  259. the HAL_DMA2D_MspDeInit could be implemented in the user file
  260. */
  261. }
  262. /**
  263. * @}
  264. */
  265. /** @defgroup DMA2D_Group2 IO operation functions
  266. * @brief IO operation functions
  267. *
  268. @verbatim
  269. ===============================================================================
  270. ##### IO operation functions #####
  271. ===============================================================================
  272. [..] This section provides functions allowing to:
  273. (+) Configure the pdata, destination address and data size and
  274. Start DMA2D transfer.
  275. (+) Configure the source for foreground and background, destination address
  276. and data size and Start MultiBuffer DMA2D transfer.
  277. (+) Configure the pdata, destination address and data size and
  278. Start DMA2D transfer with interrupt.
  279. (+) Configure the source for foreground and background, destination address
  280. and data size and Start MultiBuffer DMA2D transfer with interrupt.
  281. (+) Abort DMA2D transfer.
  282. (+) Suspend DMA2D transfer.
  283. (+) Continue DMA2D transfer.
  284. (+) Poll for transfer complete.
  285. (+) handle DMA2D interrupt request.
  286. @endverbatim
  287. * @{
  288. */
  289. /**
  290. * @brief Start the DMA2D Transfer.
  291. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  292. * the configuration information for the DMA2D.
  293. * @param pdata: Configure the source memory Buffer address if
  294. * the memory to memory or memory to memory with pixel format
  295. * conversion DMA2D mode is selected, and configure
  296. * the color value if register to memory DMA2D mode is selected.
  297. * @param DstAddress: The destination memory Buffer address.
  298. * @param Width: The width of data to be transferred from source to destination.
  299. * @param Height: The height of data to be transferred from source to destination.
  300. * @retval HAL status
  301. */
  302. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  303. {
  304. /* Process locked */
  305. __HAL_LOCK(hdma2d);
  306. /* Change DMA2D peripheral state */
  307. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  308. /* Check the parameters */
  309. assert_param(IS_DMA2D_LINE(Height));
  310. assert_param(IS_DMA2D_PIXEL(Width));
  311. /* Disable the Peripheral */
  312. __HAL_DMA2D_DISABLE(hdma2d);
  313. /* Configure the source, destination address and the data size */
  314. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  315. /* Enable the Peripheral */
  316. __HAL_DMA2D_ENABLE(hdma2d);
  317. return HAL_OK;
  318. }
  319. /**
  320. * @brief Start the DMA2D Transfer with interrupt enabled.
  321. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  322. * the configuration information for the DMA2D.
  323. * @param pdata: Configure the source memory Buffer address if
  324. * the memory to memory or memory to memory with pixel format
  325. * conversion DMA2D mode is selected, and configure
  326. * the color value if register to memory DMA2D mode is selected.
  327. * @param DstAddress: The destination memory Buffer address.
  328. * @param Width: The width of data to be transferred from source to destination.
  329. * @param Height: The height of data to be transferred from source to destination.
  330. * @retval HAL status
  331. */
  332. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  333. {
  334. /* Process locked */
  335. __HAL_LOCK(hdma2d);
  336. /* Change DMA2D peripheral state */
  337. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  338. /* Check the parameters */
  339. assert_param(IS_DMA2D_LINE(Height));
  340. assert_param(IS_DMA2D_PIXEL(Width));
  341. /* Disable the Peripheral */
  342. __HAL_DMA2D_DISABLE(hdma2d);
  343. /* Configure the source, destination address and the data size */
  344. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  345. /* Enable the transfer complete interrupt */
  346. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  347. /* Enable the transfer Error interrupt */
  348. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  349. /* Enable the Peripheral */
  350. __HAL_DMA2D_ENABLE(hdma2d);
  351. /* Enable the configuration error interrupt */
  352. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  353. return HAL_OK;
  354. }
  355. /**
  356. * @brief Start the multi-source DMA2D Transfer.
  357. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  358. * the configuration information for the DMA2D.
  359. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  360. * @param SrcAddress2: The source memory Buffer address of the background layer.
  361. * @param DstAddress: The destination memory Buffer address
  362. * @param Width: The width of data to be transferred from source to destination.
  363. * @param Height: The height of data to be transferred from source to destination.
  364. * @retval HAL status
  365. */
  366. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  367. {
  368. /* Process locked */
  369. __HAL_LOCK(hdma2d);
  370. /* Change DMA2D peripheral state */
  371. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  372. /* Check the parameters */
  373. assert_param(IS_DMA2D_LINE(Height));
  374. assert_param(IS_DMA2D_PIXEL(Width));
  375. /* Disable the Peripheral */
  376. __HAL_DMA2D_DISABLE(hdma2d);
  377. /* Configure DMA2D Stream source2 address */
  378. hdma2d->Instance->BGMAR = SrcAddress2;
  379. /* Configure the source, destination address and the data size */
  380. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  381. /* Enable the Peripheral */
  382. __HAL_DMA2D_ENABLE(hdma2d);
  383. return HAL_OK;
  384. }
  385. /**
  386. * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
  387. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  388. * the configuration information for the DMA2D.
  389. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  390. * @param SrcAddress2: The source memory Buffer address of the background layer.
  391. * @param DstAddress: The destination memory Buffer address.
  392. * @param Width: The width of data to be transferred from source to destination.
  393. * @param Height: The height of data to be transferred from source to destination.
  394. * @retval HAL status
  395. */
  396. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  397. {
  398. /* Process locked */
  399. __HAL_LOCK(hdma2d);
  400. /* Change DMA2D peripheral state */
  401. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  402. /* Check the parameters */
  403. assert_param(IS_DMA2D_LINE(Height));
  404. assert_param(IS_DMA2D_PIXEL(Width));
  405. /* Disable the Peripheral */
  406. __HAL_DMA2D_DISABLE(hdma2d);
  407. /* Configure DMA2D Stream source2 address */
  408. hdma2d->Instance->BGMAR = SrcAddress2;
  409. /* Configure the source, destination address and the data size */
  410. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  411. /* Enable the configuration error interrupt */
  412. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  413. /* Enable the transfer complete interrupt */
  414. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  415. /* Enable the transfer Error interrupt */
  416. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  417. /* Enable the Peripheral */
  418. __HAL_DMA2D_ENABLE(hdma2d);
  419. return HAL_OK;
  420. }
  421. /**
  422. * @brief Abort the DMA2D Transfer.
  423. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  424. * the configuration information for the DMA2D.
  425. * @retval HAL status
  426. */
  427. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
  428. {
  429. uint32_t tickstart = 0;
  430. /* Disable the DMA2D */
  431. __HAL_DMA2D_DISABLE(hdma2d);
  432. /* Get tick */
  433. tickstart = HAL_GetTick();
  434. /* Check if the DMA2D is effectively disabled */
  435. while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  436. {
  437. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
  438. {
  439. /* Update error code */
  440. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  441. /* Change the DMA2D state */
  442. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  443. /* Process Unlocked */
  444. __HAL_UNLOCK(hdma2d);
  445. return HAL_TIMEOUT;
  446. }
  447. }
  448. /* Process Unlocked */
  449. __HAL_UNLOCK(hdma2d);
  450. /* Change the DMA2D state*/
  451. hdma2d->State = HAL_DMA2D_STATE_READY;
  452. return HAL_OK;
  453. }
  454. /**
  455. * @brief Suspend the DMA2D Transfer.
  456. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  457. * the configuration information for the DMA2D.
  458. * @retval HAL status
  459. */
  460. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
  461. {
  462. uint32_t tickstart = 0;
  463. /* Suspend the DMA2D transfer */
  464. hdma2d->Instance->CR |= DMA2D_CR_SUSP;
  465. /* Get tick */
  466. tickstart = HAL_GetTick();
  467. /* Check if the DMA2D is effectively suspended */
  468. while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
  469. {
  470. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
  471. {
  472. /* Update error code */
  473. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  474. /* Change the DMA2D state */
  475. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  476. return HAL_TIMEOUT;
  477. }
  478. }
  479. /* Change the DMA2D state*/
  480. hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
  481. return HAL_OK;
  482. }
  483. /**
  484. * @brief Resume the DMA2D Transfer.
  485. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  486. * the configuration information for the DMA2D.
  487. * @retval HAL status
  488. */
  489. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
  490. {
  491. /* Resume the DMA2D transfer */
  492. hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
  493. /* Change the DMA2D state*/
  494. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  495. return HAL_OK;
  496. }
  497. /**
  498. * @brief Polling for transfer complete or CLUT loading.
  499. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  500. * the configuration information for the DMA2D.
  501. * @param Timeout: Timeout duration
  502. * @retval HAL status
  503. */
  504. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
  505. {
  506. uint32_t tmp, tmp1;
  507. uint32_t tickstart = 0;
  508. /* Polling for DMA2D transfer */
  509. if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  510. {
  511. /* Get tick */
  512. tickstart = HAL_GetTick();
  513. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
  514. {
  515. tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
  516. tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
  517. if((tmp != RESET) || (tmp1 != RESET))
  518. {
  519. /* Clear the transfer and configuration error flags */
  520. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  521. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  522. /* Change DMA2D state */
  523. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  524. /* Process unlocked */
  525. __HAL_UNLOCK(hdma2d);
  526. return HAL_ERROR;
  527. }
  528. /* Check for the Timeout */
  529. if(Timeout != HAL_MAX_DELAY)
  530. {
  531. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  532. {
  533. /* Process unlocked */
  534. __HAL_UNLOCK(hdma2d);
  535. /* Update error code */
  536. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  537. /* Change the DMA2D state */
  538. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  539. return HAL_TIMEOUT;
  540. }
  541. }
  542. }
  543. }
  544. /* Polling for CLUT loading */
  545. if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
  546. {
  547. /* Get tick */
  548. tickstart = HAL_GetTick();
  549. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
  550. {
  551. if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
  552. {
  553. /* Clear the transfer and configuration error flags */
  554. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
  555. /* Change DMA2D state */
  556. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  557. return HAL_ERROR;
  558. }
  559. /* Check for the Timeout */
  560. if(Timeout != HAL_MAX_DELAY)
  561. {
  562. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  563. {
  564. /* Update error code */
  565. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  566. /* Change the DMA2D state */
  567. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  568. return HAL_TIMEOUT;
  569. }
  570. }
  571. }
  572. }
  573. /* Clear the transfer complete flag */
  574. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  575. /* Clear the CLUT loading flag */
  576. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
  577. /* Change DMA2D state */
  578. hdma2d->State = HAL_DMA2D_STATE_READY;
  579. /* Process unlocked */
  580. __HAL_UNLOCK(hdma2d);
  581. return HAL_OK;
  582. }
  583. /**
  584. * @brief Handles DMA2D interrupt request.
  585. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  586. * the configuration information for the DMA2D.
  587. * @retval HAL status
  588. */
  589. void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
  590. {
  591. /* Transfer Error Interrupt management ***************************************/
  592. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
  593. {
  594. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
  595. {
  596. /* Disable the transfer Error interrupt */
  597. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
  598. /* Update error code */
  599. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
  600. /* Clear the transfer error flag */
  601. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  602. /* Change DMA2D state */
  603. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  604. /* Process Unlocked */
  605. __HAL_UNLOCK(hdma2d);
  606. if(hdma2d->XferErrorCallback != NULL)
  607. {
  608. /* Transfer error Callback */
  609. hdma2d->XferErrorCallback(hdma2d);
  610. }
  611. }
  612. }
  613. /* Configuration Error Interrupt management **********************************/
  614. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
  615. {
  616. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
  617. {
  618. /* Disable the Configuration Error interrupt */
  619. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
  620. /* Clear the Configuration error flag */
  621. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  622. /* Update error code */
  623. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
  624. /* Change DMA2D state */
  625. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  626. /* Process Unlocked */
  627. __HAL_UNLOCK(hdma2d);
  628. if(hdma2d->XferErrorCallback != NULL)
  629. {
  630. /* Transfer error Callback */
  631. hdma2d->XferErrorCallback(hdma2d);
  632. }
  633. }
  634. }
  635. /* Transfer Complete Interrupt management ************************************/
  636. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
  637. {
  638. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
  639. {
  640. /* Disable the transfer complete interrupt */
  641. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
  642. /* Clear the transfer complete flag */
  643. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  644. /* Update error code */
  645. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
  646. /* Change DMA2D state */
  647. hdma2d->State = HAL_DMA2D_STATE_READY;
  648. /* Process Unlocked */
  649. __HAL_UNLOCK(hdma2d);
  650. if(hdma2d->XferCpltCallback != NULL)
  651. {
  652. /* Transfer complete Callback */
  653. hdma2d->XferCpltCallback(hdma2d);
  654. }
  655. }
  656. }
  657. }
  658. /**
  659. * @}
  660. */
  661. /** @defgroup DMA2D_Group3 Peripheral Control functions
  662. * @brief Peripheral Control functions
  663. *
  664. @verbatim
  665. ===============================================================================
  666. ##### Peripheral Control functions #####
  667. ===============================================================================
  668. [..] This section provides functions allowing to:
  669. (+) Configure the DMA2D foreground or/and background parameters.
  670. (+) Configure the DMA2D CLUT transfer.
  671. (+) Enable DMA2D CLUT.
  672. (+) Disable DMA2D CLUT.
  673. (+) Configure the line watermark
  674. @endverbatim
  675. * @{
  676. */
  677. /**
  678. * @brief Configure the DMA2D Layer according to the specified
  679. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  680. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  681. * the configuration information for the DMA2D.
  682. * @param LayerIdx: DMA2D Layer index.
  683. * This parameter can be one of the following values:
  684. * 0(background) / 1(foreground)
  685. * @retval HAL status
  686. */
  687. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  688. {
  689. DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
  690. uint32_t tmp = 0;
  691. /* Process locked */
  692. __HAL_LOCK(hdma2d);
  693. /* Change DMA2D peripheral state */
  694. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  695. /* Check the parameters */
  696. assert_param(IS_DMA2D_LAYER(LayerIdx));
  697. assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
  698. if(hdma2d->Init.Mode != DMA2D_R2M)
  699. {
  700. assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
  701. if(hdma2d->Init.Mode != DMA2D_M2M)
  702. {
  703. assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
  704. }
  705. }
  706. /* Configure the background DMA2D layer */
  707. if(LayerIdx == 0)
  708. {
  709. /* DMA2D BGPFCR register configuration -----------------------------------*/
  710. /* Get the BGPFCCR register value */
  711. tmp = hdma2d->Instance->BGPFCCR;
  712. /* Clear Input color mode, alpha value and alpha mode bits */
  713. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
  714. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  715. {
  716. /* Prepare the value to be wrote to the BGPFCCR register */
  717. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  718. }
  719. else
  720. {
  721. /* Prepare the value to be wrote to the BGPFCCR register */
  722. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  723. }
  724. /* Write to DMA2D BGPFCCR register */
  725. hdma2d->Instance->BGPFCCR = tmp;
  726. /* DMA2D BGOR register configuration -------------------------------------*/
  727. /* Get the BGOR register value */
  728. tmp = hdma2d->Instance->BGOR;
  729. /* Clear colors bits */
  730. tmp &= (uint32_t)~DMA2D_BGOR_LO;
  731. /* Prepare the value to be wrote to the BGOR register */
  732. tmp |= pLayerCfg->InputOffset;
  733. /* Write to DMA2D BGOR register */
  734. hdma2d->Instance->BGOR = tmp;
  735. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  736. {
  737. /* Prepare the value to be wrote to the BGCOLR register */
  738. tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  739. /* Write to DMA2D BGCOLR register */
  740. hdma2d->Instance->BGCOLR = tmp;
  741. }
  742. }
  743. /* Configure the foreground DMA2D layer */
  744. else
  745. {
  746. /* DMA2D FGPFCR register configuration -----------------------------------*/
  747. /* Get the FGPFCCR register value */
  748. tmp = hdma2d->Instance->FGPFCCR;
  749. /* Clear Input color mode, alpha value and alpha mode bits */
  750. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
  751. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  752. {
  753. /* Prepare the value to be wrote to the FGPFCCR register */
  754. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  755. }
  756. else
  757. {
  758. /* Prepare the value to be wrote to the FGPFCCR register */
  759. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  760. }
  761. /* Write to DMA2D FGPFCCR register */
  762. hdma2d->Instance->FGPFCCR = tmp;
  763. /* DMA2D FGOR register configuration -------------------------------------*/
  764. /* Get the FGOR register value */
  765. tmp = hdma2d->Instance->FGOR;
  766. /* Clear colors bits */
  767. tmp &= (uint32_t)~DMA2D_FGOR_LO;
  768. /* Prepare the value to be wrote to the FGOR register */
  769. tmp |= pLayerCfg->InputOffset;
  770. /* Write to DMA2D FGOR register */
  771. hdma2d->Instance->FGOR = tmp;
  772. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  773. {
  774. /* Prepare the value to be wrote to the FGCOLR register */
  775. tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  776. /* Write to DMA2D FGCOLR register */
  777. hdma2d->Instance->FGCOLR = tmp;
  778. }
  779. }
  780. /* Initialize the DMA2D state*/
  781. hdma2d->State = HAL_DMA2D_STATE_READY;
  782. /* Process unlocked */
  783. __HAL_UNLOCK(hdma2d);
  784. return HAL_OK;
  785. }
  786. /**
  787. * @brief Configure the DMA2D CLUT Transfer.
  788. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  789. * the configuration information for the DMA2D.
  790. * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
  791. * the configuration information for the color look up table.
  792. * @param LayerIdx: DMA2D Layer index.
  793. * This parameter can be one of the following values:
  794. * 0(background) / 1(foreground)
  795. * @retval HAL status
  796. */
  797. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
  798. {
  799. uint32_t tmp = 0, tmp1 = 0;
  800. /* Check the parameters */
  801. assert_param(IS_DMA2D_LAYER(LayerIdx));
  802. assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
  803. assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
  804. /* Configure the CLUT of the background DMA2D layer */
  805. if(LayerIdx == 0)
  806. {
  807. /* Get the BGCMAR register value */
  808. tmp = hdma2d->Instance->BGCMAR;
  809. /* Clear CLUT address bits */
  810. tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
  811. /* Prepare the value to be wrote to the BGCMAR register */
  812. tmp |= (uint32_t)CLUTCfg.pCLUT;
  813. /* Write to DMA2D BGCMAR register */
  814. hdma2d->Instance->BGCMAR = tmp;
  815. /* Get the BGPFCCR register value */
  816. tmp = hdma2d->Instance->BGPFCCR;
  817. /* Clear CLUT size and CLUT address bits */
  818. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
  819. /* Get the CLUT size */
  820. tmp1 = CLUTCfg.Size << 16;
  821. /* Prepare the value to be wrote to the BGPFCCR register */
  822. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  823. /* Write to DMA2D BGPFCCR register */
  824. hdma2d->Instance->BGPFCCR = tmp;
  825. }
  826. /* Configure the CLUT of the foreground DMA2D layer */
  827. else
  828. {
  829. /* Get the FGCMAR register value */
  830. tmp = hdma2d->Instance->FGCMAR;
  831. /* Clear CLUT address bits */
  832. tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
  833. /* Prepare the value to be wrote to the FGCMAR register */
  834. tmp |= (uint32_t)CLUTCfg.pCLUT;
  835. /* Write to DMA2D FGCMAR register */
  836. hdma2d->Instance->FGCMAR = tmp;
  837. /* Get the FGPFCCR register value */
  838. tmp = hdma2d->Instance->FGPFCCR;
  839. /* Clear CLUT size and CLUT address bits */
  840. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
  841. /* Get the CLUT size */
  842. tmp1 = CLUTCfg.Size << 8;
  843. /* Prepare the value to be wrote to the FGPFCCR register */
  844. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  845. /* Write to DMA2D FGPFCCR register */
  846. hdma2d->Instance->FGPFCCR = tmp;
  847. }
  848. return HAL_OK;
  849. }
  850. /**
  851. * @brief Enable the DMA2D CLUT Transfer.
  852. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  853. * the configuration information for the DMA2D.
  854. * @param LayerIdx: DMA2D Layer index.
  855. * This parameter can be one of the following values:
  856. * 0(background) / 1(foreground)
  857. * @retval HAL status
  858. */
  859. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  860. {
  861. /* Check the parameters */
  862. assert_param(IS_DMA2D_LAYER(LayerIdx));
  863. if(LayerIdx == 0)
  864. {
  865. /* Enable the CLUT loading for the background */
  866. hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
  867. }
  868. else
  869. {
  870. /* Enable the CLUT loading for the foreground */
  871. hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
  872. }
  873. return HAL_OK;
  874. }
  875. /**
  876. * @brief Disable the DMA2D CLUT Transfer.
  877. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  878. * the configuration information for the DMA2D.
  879. * @param LayerIdx: DMA2D Layer index.
  880. * This parameter can be one of the following values:
  881. * 0(background) / 1(foreground)
  882. * @retval HAL status
  883. */
  884. HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  885. {
  886. /* Check the parameters */
  887. assert_param(IS_DMA2D_LAYER(LayerIdx));
  888. if(LayerIdx == 0)
  889. {
  890. /* Disable the CLUT loading for the background */
  891. hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
  892. }
  893. else
  894. {
  895. /* Disable the CLUT loading for the foreground */
  896. hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
  897. }
  898. return HAL_OK;
  899. }
  900. /**
  901. * @brief Define the configuration of the line watermark .
  902. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  903. * the configuration information for the DMA2D.
  904. * @param Line: Line Watermark configuration.
  905. * @retval HAL status
  906. */
  907. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
  908. {
  909. /* Process locked */
  910. __HAL_LOCK(hdma2d);
  911. /* Change DMA2D peripheral state */
  912. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  913. /* Check the parameters */
  914. assert_param(IS_DMA2D_LineWatermark(Line));
  915. /* Sets the Line watermark configuration */
  916. DMA2D->LWR = (uint32_t)Line;
  917. /* Initialize the DMA2D state*/
  918. hdma2d->State = HAL_DMA2D_STATE_READY;
  919. /* Process unlocked */
  920. __HAL_UNLOCK(hdma2d);
  921. return HAL_OK;
  922. }
  923. /**
  924. * @}
  925. */
  926. /** @defgroup DMA2D_Group4 Peripheral State functions
  927. * @brief Peripheral State functions
  928. *
  929. @verbatim
  930. ===============================================================================
  931. ##### Peripheral State and Errors functions #####
  932. ===============================================================================
  933. [..]
  934. This subsection provides functions allowing to :
  935. (+) Check the DMA2D state
  936. (+) Get error code
  937. @endverbatim
  938. * @{
  939. */
  940. /**
  941. * @brief Return the DMA2D state
  942. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  943. * the configuration information for the DMA2D.
  944. * @retval HAL state
  945. */
  946. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
  947. {
  948. return hdma2d->State;
  949. }
  950. /**
  951. * @brief Return the DMA2D error code
  952. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  953. * the configuration information for DMA2D.
  954. * @retval DMA2D Error Code
  955. */
  956. uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
  957. {
  958. return hdma2d->ErrorCode;
  959. }
  960. /**
  961. * @}
  962. */
  963. /**
  964. * @brief Set the DMA2D Transfer parameter.
  965. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  966. * the configuration information for the specified DMA2D.
  967. * @param pdata: The source memory Buffer address
  968. * @param DstAddress: The destination memory Buffer address
  969. * @param Width: The width of data to be transferred from source to destination.
  970. * @param Height: The height of data to be transferred from source to destination.
  971. * @retval HAL status
  972. */
  973. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  974. {
  975. uint32_t tmp = 0;
  976. uint32_t tmp1 = 0;
  977. uint32_t tmp2 = 0;
  978. uint32_t tmp3 = 0;
  979. uint32_t tmp4 = 0;
  980. tmp = Width << 16;
  981. /* Configure DMA2D data size */
  982. hdma2d->Instance->NLR = (Height | tmp);
  983. /* Configure DMA2D destination address */
  984. hdma2d->Instance->OMAR = DstAddress;
  985. /* Register to memory DMA2D mode selected */
  986. if (hdma2d->Init.Mode == DMA2D_R2M)
  987. {
  988. tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
  989. tmp2 = pdata & DMA2D_OCOLR_RED_1;
  990. tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
  991. tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
  992. /* Prepare the value to be wrote to the OCOLR register according to the color mode */
  993. if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
  994. {
  995. tmp = (tmp3 | tmp2 | tmp1| tmp4);
  996. }
  997. else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
  998. {
  999. tmp = (tmp3 | tmp2 | tmp4);
  1000. }
  1001. else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
  1002. {
  1003. tmp2 = (tmp2 >> 19);
  1004. tmp3 = (tmp3 >> 10);
  1005. tmp4 = (tmp4 >> 3 );
  1006. tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
  1007. }
  1008. else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
  1009. {
  1010. tmp1 = (tmp1 >> 31);
  1011. tmp2 = (tmp2 >> 19);
  1012. tmp3 = (tmp3 >> 11);
  1013. tmp4 = (tmp4 >> 3 );
  1014. tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
  1015. }
  1016. else /* DMA2D_CMode = DMA2D_ARGB4444 */
  1017. {
  1018. tmp1 = (tmp1 >> 28);
  1019. tmp2 = (tmp2 >> 20);
  1020. tmp3 = (tmp3 >> 12);
  1021. tmp4 = (tmp4 >> 4 );
  1022. tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
  1023. }
  1024. /* Write to DMA2D OCOLR register */
  1025. hdma2d->Instance->OCOLR = tmp;
  1026. }
  1027. else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
  1028. {
  1029. /* Configure DMA2D source address */
  1030. hdma2d->Instance->FGMAR = pdata;
  1031. }
  1032. }
  1033. /**
  1034. * @}
  1035. */
  1036. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  1037. #endif /* HAL_DMA2D_MODULE_ENABLED */
  1038. /**
  1039. * @}
  1040. */
  1041. /**
  1042. * @}
  1043. */
  1044. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/