stm32f4xx_hal_flash_ex.c 47 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_flash_ex.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief Extended FLASH HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the FLASH extension peripheral:
  10. * + Extended programming operations functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### Flash Extension features #####
  15. ==============================================================================
  16. [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
  17. STM32F429xx/439xx devices contains the following additional features
  18. (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
  19. capability (RWW)
  20. (+) Dual bank memory organization
  21. (+) PCROP protection for all banks
  22. ##### How to use this driver #####
  23. ==============================================================================
  24. [..] This driver provides functions to configure and program the FLASH memory
  25. of all STM32F427xx/437xx andSTM32F429xx/439xx devices. It includes
  26. (#) FLASH Memory Erase functions:
  27. (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
  28. HAL_FLASH_Lock() functions
  29. (++) Erase function: Erase sector, erase all sectors
  30. (++) There are two modes of erase :
  31. (+++) Polling Mode using HAL_FLASHEx_Erase()
  32. (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
  33. (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
  34. (++) Set/Reset the write protection
  35. (++) Set the Read protection Level
  36. (++) Set the BOR level
  37. (++) Program the user Option Bytes
  38. (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
  39. (++) Extended space (bank 2) erase function
  40. (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
  41. (++) Dual Boot activation
  42. (++) Write protection configuration for bank 2
  43. (++) PCROP protection configuration and control for both banks
  44. @endverbatim
  45. ******************************************************************************
  46. * @attention
  47. *
  48. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  49. *
  50. * Redistribution and use in source and binary forms, with or without modification,
  51. * are permitted provided that the following conditions are met:
  52. * 1. Redistributions of source code must retain the above copyright notice,
  53. * this list of conditions and the following disclaimer.
  54. * 2. Redistributions in binary form must reproduce the above copyright notice,
  55. * this list of conditions and the following disclaimer in the documentation
  56. * and/or other materials provided with the distribution.
  57. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  58. * may be used to endorse or promote products derived from this software
  59. * without specific prior written permission.
  60. *
  61. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  62. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  63. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  64. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  65. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  66. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  67. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  68. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  69. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  70. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  71. *
  72. ******************************************************************************
  73. */
  74. /* Includes ------------------------------------------------------------------*/
  75. #include "stm32f4xx_hal.h"
  76. /** @addtogroup STM32F4xx_HAL_Driver
  77. * @{
  78. */
  79. /** @defgroup FLASHEx FLASHEx
  80. * @brief FLASH HAL Extension module driver
  81. * @{
  82. */
  83. #ifdef HAL_FLASH_MODULE_ENABLED
  84. /* Private typedef -----------------------------------------------------------*/
  85. /* Private define ------------------------------------------------------------*/
  86. /** @addtogroup FLASHEx_Private_Constants
  87. * @{
  88. */
  89. #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
  90. #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
  91. /**
  92. * @}
  93. */
  94. /* Private macro -------------------------------------------------------------*/
  95. /* Private variables ---------------------------------------------------------*/
  96. /** @addtogroup FLASHEx_Private_Variables
  97. * @{
  98. */
  99. extern FLASH_ProcessTypeDef pFlash;
  100. /**
  101. * @}
  102. */
  103. /* Private function prototypes -----------------------------------------------*/
  104. /** @addtogroup FLASHEx_Private_Functions
  105. * @{
  106. */
  107. /* Option bytes control */
  108. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
  109. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
  110. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
  111. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
  112. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
  113. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
  114. static uint8_t FLASH_OB_GetUser(void);
  115. static uint16_t FLASH_OB_GetWRP(void);
  116. static FlagStatus FLASH_OB_GetRDP(void);
  117. static uint8_t FLASH_OB_GetBOR(void);
  118. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  119. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
  120. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
  121. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
  122. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  123. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  124. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  125. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
  126. #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
  127. extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
  128. /**
  129. * @}
  130. */
  131. /* Exported functions --------------------------------------------------------*/
  132. /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
  133. * @{
  134. */
  135. /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
  136. * @brief Extended IO operation functions
  137. *
  138. @verbatim
  139. ===============================================================================
  140. ##### Extended programming operation functions #####
  141. ===============================================================================
  142. [..]
  143. This subsection provides a set of functions allowing to manage the Extension FLASH
  144. programming operations Operations.
  145. @endverbatim
  146. * @{
  147. */
  148. /**
  149. * @brief Perform a mass erase or erase the specified FLASH memory sectors
  150. * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  151. * contains the configuration information for the erasing.
  152. *
  153. * @param[out] SectorError: pointer to variable that
  154. * contains the configuration information on faulty sector in case of error
  155. * (0xFFFFFFFF means that all the sectors have been correctly erased)
  156. *
  157. * @retval HAL Status
  158. */
  159. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
  160. {
  161. HAL_StatusTypeDef status = HAL_ERROR;
  162. uint32_t index = 0;
  163. /* Process Locked */
  164. __HAL_LOCK(&pFlash);
  165. /* Check the parameters */
  166. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  167. /* Wait for last operation to be completed */
  168. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  169. if(status == HAL_OK)
  170. {
  171. /*Initialization of SectorError variable*/
  172. *SectorError = 0xFFFFFFFF;
  173. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  174. {
  175. /*Mass erase to be done*/
  176. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  177. /* Wait for last operation to be completed */
  178. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  179. /* if the erase operation is completed, disable the MER Bit */
  180. FLASH->CR &= (~FLASH_MER_BIT);
  181. }
  182. else
  183. {
  184. /* Check the parameters */
  185. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  186. /* Erase by sector by sector to be done*/
  187. for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
  188. {
  189. FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
  190. /* Wait for last operation to be completed */
  191. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  192. /* If the erase operation is completed, disable the SER Bit */
  193. FLASH->CR &= (~FLASH_CR_SER);
  194. FLASH->CR &= SECTOR_MASK;
  195. if(status != HAL_OK)
  196. {
  197. /* In case of error, stop erase procedure and return the faulty sector*/
  198. *SectorError = index;
  199. break;
  200. }
  201. }
  202. }
  203. }
  204. /* Process Unlocked */
  205. __HAL_UNLOCK(&pFlash);
  206. return status;
  207. }
  208. /**
  209. * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
  210. * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  211. * contains the configuration information for the erasing.
  212. *
  213. * @retval HAL Status
  214. */
  215. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
  216. {
  217. HAL_StatusTypeDef status = HAL_OK;
  218. /* Process Locked */
  219. __HAL_LOCK(&pFlash);
  220. /* Check the parameters */
  221. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  222. /* Enable End of FLASH Operation interrupt */
  223. __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
  224. /* Enable Error source interrupt */
  225. __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
  226. /* Clear pending flags (if any) */
  227. __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
  228. FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
  229. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  230. {
  231. /*Mass erase to be done*/
  232. pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
  233. pFlash.Bank = pEraseInit->Banks;
  234. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  235. }
  236. else
  237. {
  238. /* Erase by sector to be done*/
  239. /* Check the parameters */
  240. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  241. pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
  242. pFlash.NbSectorsToErase = pEraseInit->NbSectors;
  243. pFlash.Sector = pEraseInit->Sector;
  244. pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
  245. /*Erase 1st sector and wait for IT*/
  246. FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
  247. }
  248. return status;
  249. }
  250. /**
  251. * @brief Program option bytes
  252. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  253. * contains the configuration information for the programming.
  254. *
  255. * @retval HAL Status
  256. */
  257. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
  258. {
  259. HAL_StatusTypeDef status = HAL_ERROR;
  260. /* Process Locked */
  261. __HAL_LOCK(&pFlash);
  262. /* Check the parameters */
  263. assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
  264. /*Write protection configuration*/
  265. if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
  266. {
  267. assert_param(IS_WRPSTATE(pOBInit->WRPState));
  268. if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
  269. {
  270. /*Enable of Write protection on the selected Sector*/
  271. status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
  272. }
  273. else
  274. {
  275. /*Disable of Write protection on the selected Sector*/
  276. status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
  277. }
  278. }
  279. /*Read protection configuration*/
  280. if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
  281. {
  282. status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
  283. }
  284. /*USER configuration*/
  285. if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
  286. {
  287. status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
  288. pOBInit->USERConfig&OB_STOP_NO_RST,
  289. pOBInit->USERConfig&OB_STDBY_NO_RST);
  290. }
  291. /*BOR Level configuration*/
  292. if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
  293. {
  294. status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
  295. }
  296. /* Process Unlocked */
  297. __HAL_UNLOCK(&pFlash);
  298. return status;
  299. }
  300. /**
  301. * @brief Get the Option byte configuration
  302. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  303. * contains the configuration information for the programming.
  304. *
  305. * @retval None
  306. */
  307. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
  308. {
  309. pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
  310. /*Get WRP*/
  311. pOBInit->WRPSector = FLASH_OB_GetWRP();
  312. /*Get RDP Level*/
  313. pOBInit->RDPLevel = FLASH_OB_GetRDP();
  314. /*Get USER*/
  315. pOBInit->USERConfig = FLASH_OB_GetUser();
  316. /*Get BOR Level*/
  317. pOBInit->BORLevel = FLASH_OB_GetBOR();
  318. }
  319. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
  320. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  321. /**
  322. * @brief Program option bytes
  323. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  324. * contains the configuration information for the programming.
  325. *
  326. * @retval HAL Status
  327. */
  328. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  329. {
  330. HAL_StatusTypeDef status = HAL_ERROR;
  331. /* Check the parameters */
  332. assert_param(IS_OBEX(pAdvOBInit->OptionType));
  333. /*Program PCROP option byte*/
  334. if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
  335. {
  336. /* Check the parameters */
  337. assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
  338. if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
  339. {
  340. /*Enable of Write protection on the selected Sector*/
  341. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  342. status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
  343. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
  344. status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  345. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
  346. }
  347. else
  348. {
  349. /*Disable of Write protection on the selected Sector*/
  350. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  351. status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
  352. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
  353. status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  354. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
  355. }
  356. }
  357. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  358. /*Program BOOT config option byte*/
  359. if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
  360. {
  361. status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
  362. }
  363. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  364. return status;
  365. }
  366. /**
  367. * @brief Get the OBEX byte configuration
  368. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  369. * contains the configuration information for the programming.
  370. *
  371. * @retval None
  372. */
  373. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  374. {
  375. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  376. /*Get Sector*/
  377. pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  378. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
  379. /*Get Sector for Bank1*/
  380. pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  381. /*Get Sector for Bank2*/
  382. pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  383. /*Get Boot config OB*/
  384. pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
  385. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
  386. }
  387. /**
  388. * @brief Select the Protection Mode
  389. *
  390. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  391. * Global Read Out Protection modification (from level1 to level0)
  392. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  393. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  394. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx devices.
  395. *
  396. * @retval HAL Status
  397. */
  398. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
  399. {
  400. uint8_t optiontmp = 0xFF;
  401. /* Mask SPRMOD bit */
  402. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  403. /* Update Option Byte */
  404. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
  405. return HAL_OK;
  406. }
  407. /**
  408. * @brief Deselect the Protection Mode
  409. *
  410. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  411. * Global Read Out Protection modification (from level1 to level0)
  412. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  413. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  414. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx devices.
  415. *
  416. * @retval HAL Status
  417. */
  418. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
  419. {
  420. uint8_t optiontmp = 0xFF;
  421. /* Mask SPRMOD bit */
  422. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  423. /* Update Option Byte */
  424. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
  425. return HAL_OK;
  426. }
  427. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
  428. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  429. /**
  430. * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
  431. * @note This function can be used only for STM32F427X and STM32F429X devices.
  432. * @retval The FLASH Write Protection Option Bytes value
  433. */
  434. uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
  435. {
  436. /* Return the FLASH write protection Register value */
  437. return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  438. }
  439. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  440. /**
  441. * @}
  442. */
  443. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  444. /**
  445. * @brief Full erase of FLASH memory sectors
  446. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  447. * This parameter can be one of the following values:
  448. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  449. * the operation will be done by byte (8-bit)
  450. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  451. * the operation will be done by half word (16-bit)
  452. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  453. * the operation will be done by word (32-bit)
  454. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  455. * the operation will be done by double word (64-bit)
  456. *
  457. * @param Banks: Banks to be erased
  458. * This parameter can be one of the following values:
  459. * @arg FLASH_BANK_1: Bank1 to be erased
  460. * @arg FLASH_BANK_2: Bank2 to be erased
  461. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  462. *
  463. * @retval HAL Status
  464. */
  465. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  466. {
  467. uint32_t tmp_psize = 0;
  468. /* Check the parameters */
  469. assert_param(IS_VOLTAGERANGE(VoltageRange));
  470. assert_param(IS_FLASH_BANK(Banks));
  471. /* if the previous operation is completed, proceed to erase all sectors */
  472. FLASH->CR &= CR_PSIZE_MASK;
  473. FLASH->CR |= tmp_psize;
  474. if(Banks == FLASH_BANK_BOTH)
  475. {
  476. /* bank1 & bank2 will be erased*/
  477. FLASH->CR |= FLASH_MER_BIT;
  478. }
  479. else if(Banks == FLASH_BANK_1)
  480. {
  481. /*Only bank1 will be erased*/
  482. FLASH->CR |= FLASH_CR_MER1;
  483. }
  484. else
  485. {
  486. /*Only bank2 will be erased*/
  487. FLASH->CR |= FLASH_CR_MER2;
  488. }
  489. FLASH->CR |= FLASH_CR_STRT;
  490. }
  491. /**
  492. * @brief Erase the specified FLASH memory sector
  493. * @param Sector: FLASH sector to erase
  494. * The value of this parameter depend on device used within the same series
  495. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  496. * This parameter can be one of the following values:
  497. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  498. * the operation will be done by byte (8-bit)
  499. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  500. * the operation will be done by half word (16-bit)
  501. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  502. * the operation will be done by word (32-bit)
  503. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  504. * the operation will be done by double word (64-bit)
  505. *
  506. * @retval None
  507. */
  508. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  509. {
  510. uint32_t tmp_psize = 0;
  511. /* Check the parameters */
  512. assert_param(IS_FLASH_SECTOR(Sector));
  513. assert_param(IS_VOLTAGERANGE(VoltageRange));
  514. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  515. {
  516. tmp_psize = FLASH_PSIZE_BYTE;
  517. }
  518. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  519. {
  520. tmp_psize = FLASH_PSIZE_HALF_WORD;
  521. }
  522. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  523. {
  524. tmp_psize = FLASH_PSIZE_WORD;
  525. }
  526. else
  527. {
  528. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  529. }
  530. /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  531. if(Sector > FLASH_SECTOR_11)
  532. {
  533. Sector += 4;
  534. }
  535. /* If the previous operation is completed, proceed to erase the sector */
  536. FLASH->CR &= CR_PSIZE_MASK;
  537. FLASH->CR |= tmp_psize;
  538. FLASH->CR &= SECTOR_MASK;
  539. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  540. FLASH->CR |= FLASH_CR_STRT;
  541. }
  542. /**
  543. * @brief Enable the write protection of the desired bank1 or bank 2 sectors
  544. *
  545. * @note When the memory read protection level is selected (RDP level = 1),
  546. * it is not possible to program or erase the flash sector i if CortexM4
  547. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  548. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  549. *
  550. * @param WRPSector: specifies the sector(s) to be write protected.
  551. * This parameter can be one of the following values:
  552. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  553. * @arg OB_WRP_SECTOR_All
  554. * @note BANK2 starts from OB_WRP_SECTOR_12
  555. *
  556. * @param Banks: Enable write protection on all the sectors for the specific bank
  557. * This parameter can be one of the following values:
  558. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  559. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  560. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  561. *
  562. * @retval HAL FLASH State
  563. */
  564. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  565. {
  566. HAL_StatusTypeDef status = HAL_OK;
  567. /* Check the parameters */
  568. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  569. assert_param(IS_FLASH_BANK(Banks));
  570. /* Wait for last operation to be completed */
  571. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  572. if(status == HAL_OK)
  573. {
  574. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  575. (WRPSector < OB_WRP_SECTOR_12))
  576. {
  577. if(WRPSector == OB_WRP_SECTOR_All)
  578. {
  579. /*Write protection on all sector of BANK1*/
  580. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
  581. }
  582. else
  583. {
  584. /*Write protection done on sectors of BANK1*/
  585. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  586. }
  587. }
  588. else
  589. {
  590. /*Write protection done on sectors of BANK2*/
  591. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  592. }
  593. /*Write protection on all sector of BANK2*/
  594. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  595. {
  596. /* Wait for last operation to be completed */
  597. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  598. if(status == HAL_OK)
  599. {
  600. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  601. }
  602. }
  603. }
  604. return status;
  605. }
  606. /**
  607. * @brief Disable the write protection of the desired bank1 or bank 2 sectors
  608. *
  609. * @note When the memory read protection level is selected (RDP level = 1),
  610. * it is not possible to program or erase the flash sector i if CortexM4
  611. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  612. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  613. *
  614. * @param WRPSector: specifies the sector(s) to be write protected.
  615. * This parameter can be one of the following values:
  616. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  617. * @arg OB_WRP_Sector_All
  618. * @note BANK2 starts from OB_WRP_SECTOR_12
  619. *
  620. * @param Banks: Disable write protection on all the sectors for the specific bank
  621. * This parameter can be one of the following values:
  622. * @arg FLASH_BANK_1: Bank1 to be erased
  623. * @arg FLASH_BANK_2: Bank2 to be erased
  624. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  625. *
  626. * @retval HAL Status
  627. */
  628. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  629. {
  630. HAL_StatusTypeDef status = HAL_OK;
  631. /* Check the parameters */
  632. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  633. assert_param(IS_FLASH_BANK(Banks));
  634. /* Wait for last operation to be completed */
  635. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  636. if(status == HAL_OK)
  637. {
  638. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  639. (WRPSector < OB_WRP_SECTOR_12))
  640. {
  641. if(WRPSector == OB_WRP_SECTOR_All)
  642. {
  643. /*Write protection on all sector of BANK1*/
  644. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  645. }
  646. else
  647. {
  648. /*Write protection done on sectors of BANK1*/
  649. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  650. }
  651. }
  652. else
  653. {
  654. /*Write protection done on sectors of BANK2*/
  655. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  656. }
  657. /*Write protection on all sector of BANK2*/
  658. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  659. {
  660. /* Wait for last operation to be completed */
  661. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  662. if(status == HAL_OK)
  663. {
  664. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  665. }
  666. }
  667. }
  668. return status;
  669. }
  670. /**
  671. * @brief Configure the Dual Bank Boot.
  672. *
  673. * @note This function can be used only for STM32F42xxx/43xxx devices.
  674. *
  675. * @param BootConfig specifies the Dual Bank Boot Option byte.
  676. * This parameter can be one of the following values:
  677. * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
  678. * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
  679. * @retval None
  680. */
  681. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
  682. {
  683. HAL_StatusTypeDef status = HAL_OK;
  684. /* Check the parameters */
  685. assert_param(IS_OB_BOOT(BootConfig));
  686. /* Wait for last operation to be completed */
  687. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  688. if(status == HAL_OK)
  689. {
  690. /* Set Dual Bank Boot */
  691. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
  692. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  693. }
  694. return status;
  695. }
  696. /**
  697. * @brief Enable the read/write protection (PCROP) of the desired
  698. * sectors of Bank 1 and/or Bank 2.
  699. * @note This function can be used only for STM32F42xxx/43xxx devices.
  700. * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
  701. * This parameter can be one of the following values:
  702. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  703. * @arg OB_PCROP_SECTOR__All
  704. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  705. * This parameter can be one of the following values:
  706. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  707. * @arg OB_PCROP_SECTOR__All
  708. * @param Banks Enable PCROP protection on all the sectors for the specific bank
  709. * This parameter can be one of the following values:
  710. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  711. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  712. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  713. *
  714. * @retval HAL Status
  715. */
  716. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  717. {
  718. HAL_StatusTypeDef status = HAL_OK;
  719. assert_param(IS_FLASH_BANK(Banks));
  720. /* Wait for last operation to be completed */
  721. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  722. if(status == HAL_OK)
  723. {
  724. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  725. {
  726. assert_param(IS_OB_PCROP(SectorBank1));
  727. /*Write protection done on sectors of BANK1*/
  728. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
  729. }
  730. else
  731. {
  732. assert_param(IS_OB_PCROP(SectorBank2));
  733. /*Write protection done on sectors of BANK2*/
  734. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  735. }
  736. /*Write protection on all sector of BANK2*/
  737. if(Banks == FLASH_BANK_BOTH)
  738. {
  739. assert_param(IS_OB_PCROP(SectorBank2));
  740. /* Wait for last operation to be completed */
  741. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  742. if(status == HAL_OK)
  743. {
  744. /*Write protection done on sectors of BANK2*/
  745. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  746. }
  747. }
  748. }
  749. return status;
  750. }
  751. /**
  752. * @brief Disable the read/write protection (PCROP) of the desired
  753. * sectors of Bank 1 and/or Bank 2.
  754. * @note This function can be used only for STM32F42xxx/43xxx devices.
  755. * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
  756. * This parameter can be one of the following values:
  757. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  758. * @arg OB_PCROP_SECTOR__All
  759. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  760. * This parameter can be one of the following values:
  761. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  762. * @arg OB_PCROP_SECTOR__All
  763. * @param Banks Disable PCROP protection on all the sectors for the specific bank
  764. * This parameter can be one of the following values:
  765. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  766. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  767. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  768. *
  769. * @retval HAL Status
  770. */
  771. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  772. {
  773. HAL_StatusTypeDef status = HAL_OK;
  774. /* Check the parameters */
  775. assert_param(IS_FLASH_BANK(Banks));
  776. /* Wait for last operation to be completed */
  777. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  778. if(status == HAL_OK)
  779. {
  780. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  781. {
  782. assert_param(IS_OB_PCROP(SectorBank1));
  783. /*Write protection done on sectors of BANK1*/
  784. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
  785. }
  786. else
  787. {
  788. /*Write protection done on sectors of BANK2*/
  789. assert_param(IS_OB_PCROP(SectorBank2));
  790. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  791. }
  792. /*Write protection on all sector of BANK2*/
  793. if(Banks == FLASH_BANK_BOTH)
  794. {
  795. assert_param(IS_OB_PCROP(SectorBank2));
  796. /* Wait for last operation to be completed */
  797. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  798. if(status == HAL_OK)
  799. {
  800. /*Write protection done on sectors of BANK2*/
  801. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  802. }
  803. }
  804. }
  805. return status;
  806. }
  807. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  808. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
  809. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  810. /**
  811. * @brief Mass erase of FLASH memory
  812. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  813. * This parameter can be one of the following values:
  814. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  815. * the operation will be done by byte (8-bit)
  816. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  817. * the operation will be done by half word (16-bit)
  818. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  819. * the operation will be done by word (32-bit)
  820. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  821. * the operation will be done by double word (64-bit)
  822. *
  823. * @param Banks: Banks to be erased
  824. * This parameter can be one of the following values:
  825. * @arg FLASH_BANK_1: Bank1 to be erased
  826. *
  827. * @retval None
  828. */
  829. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  830. {
  831. uint32_t tmp_psize = 0;
  832. /* Check the parameters */
  833. assert_param(IS_VOLTAGERANGE(VoltageRange));
  834. assert_param(IS_FLASH_BANK(Banks));
  835. /* If the previous operation is completed, proceed to erase all sectors */
  836. FLASH->CR &= CR_PSIZE_MASK;
  837. FLASH->CR |= tmp_psize;
  838. FLASH->CR |= FLASH_CR_MER;
  839. FLASH->CR |= FLASH_CR_STRT;
  840. }
  841. /**
  842. * @brief Erase the specified FLASH memory sector
  843. * @param Sector: FLASH sector to erase
  844. * The value of this parameter depend on device used within the same series
  845. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  846. * This parameter can be one of the following values:
  847. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  848. * the operation will be done by byte (8-bit)
  849. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  850. * the operation will be done by half word (16-bit)
  851. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  852. * the operation will be done by word (32-bit)
  853. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  854. * the operation will be done by double word (64-bit)
  855. *
  856. * @retval None
  857. */
  858. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  859. {
  860. uint32_t tmp_psize = 0;
  861. /* Check the parameters */
  862. assert_param(IS_FLASH_SECTOR(Sector));
  863. assert_param(IS_VOLTAGERANGE(VoltageRange));
  864. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  865. {
  866. tmp_psize = FLASH_PSIZE_BYTE;
  867. }
  868. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  869. {
  870. tmp_psize = FLASH_PSIZE_HALF_WORD;
  871. }
  872. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  873. {
  874. tmp_psize = FLASH_PSIZE_WORD;
  875. }
  876. else
  877. {
  878. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  879. }
  880. /* If the previous operation is completed, proceed to erase the sector */
  881. FLASH->CR &= CR_PSIZE_MASK;
  882. FLASH->CR |= tmp_psize;
  883. FLASH->CR &= SECTOR_MASK;
  884. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  885. FLASH->CR |= FLASH_CR_STRT;
  886. }
  887. /**
  888. * @brief Enable the write protection of the desired bank 1 sectors
  889. *
  890. * @note When the memory read protection level is selected (RDP level = 1),
  891. * it is not possible to program or erase the flash sector i if CortexM4
  892. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  893. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  894. *
  895. * @param WRPSector: specifies the sector(s) to be write protected.
  896. * The value of this parameter depend on device used within the same series
  897. *
  898. * @param Banks: Enable write protection on all the sectors for the specific bank
  899. * This parameter can be one of the following values:
  900. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  901. *
  902. * @retval HAL Status
  903. */
  904. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  905. {
  906. HAL_StatusTypeDef status = HAL_OK;
  907. /* Check the parameters */
  908. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  909. assert_param(IS_FLASH_BANK(Banks));
  910. /* Wait for last operation to be completed */
  911. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  912. if(status == HAL_OK)
  913. {
  914. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  915. }
  916. return status;
  917. }
  918. /**
  919. * @brief Disable the write protection of the desired bank 1 sectors
  920. *
  921. * @note When the memory read protection level is selected (RDP level = 1),
  922. * it is not possible to program or erase the flash sector i if CortexM4
  923. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  924. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  925. *
  926. * @param WRPSector: specifies the sector(s) to be write protected.
  927. * The value of this parameter depend on device used within the same series
  928. *
  929. * @param Banks: Enable write protection on all the sectors for the specific bank
  930. * This parameter can be one of the following values:
  931. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  932. *
  933. * @retval HAL Status
  934. */
  935. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  936. {
  937. HAL_StatusTypeDef status = HAL_OK;
  938. /* Check the parameters */
  939. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  940. assert_param(IS_FLASH_BANK(Banks));
  941. /* Wait for last operation to be completed */
  942. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  943. if(status == HAL_OK)
  944. {
  945. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  946. }
  947. return status;
  948. }
  949. #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */
  950. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
  951. /**
  952. * @brief Enable the read/write protection (PCROP) of the desired sectors.
  953. * @note This function can be used only for STM32F401xx devices.
  954. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  955. * This parameter can be one of the following values:
  956. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  957. * @arg OB_PCROP_Sector_All
  958. * @retval HAL Status
  959. */
  960. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
  961. {
  962. HAL_StatusTypeDef status = HAL_OK;
  963. /* Check the parameters */
  964. assert_param(IS_OB_PCROP(Sector));
  965. /* Wait for last operation to be completed */
  966. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  967. if(status == HAL_OK)
  968. {
  969. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  970. }
  971. return status;
  972. }
  973. /**
  974. * @brief Disable the read/write protection (PCROP) of the desired sectors.
  975. * @note This function can be used only for STM32F401xx devices.
  976. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  977. * This parameter can be one of the following values:
  978. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  979. * @arg OB_PCROP_Sector_All
  980. * @retval HAL Status
  981. */
  982. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
  983. {
  984. HAL_StatusTypeDef status = HAL_OK;
  985. /* Check the parameters */
  986. assert_param(IS_OB_PCROP(Sector));
  987. /* Wait for last operation to be completed */
  988. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  989. if(status == HAL_OK)
  990. {
  991. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
  992. }
  993. return status;
  994. }
  995. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
  996. /**
  997. * @brief Set the read protection level.
  998. * @param Level: specifies the read protection level.
  999. * This parameter can be one of the following values:
  1000. * @arg OB_RDP_LEVEL_0: No protection
  1001. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1002. * @arg OB_RDP_LEVEL_2: Full chip protection
  1003. *
  1004. * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
  1005. *
  1006. * @retval HAL Status
  1007. */
  1008. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
  1009. {
  1010. HAL_StatusTypeDef status = HAL_OK;
  1011. /* Check the parameters */
  1012. assert_param(IS_OB_RDP_LEVEL(Level));
  1013. /* Wait for last operation to be completed */
  1014. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1015. if(status == HAL_OK)
  1016. {
  1017. *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
  1018. }
  1019. return status;
  1020. }
  1021. /**
  1022. * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  1023. * @param Iwdg: Selects the IWDG mode
  1024. * This parameter can be one of the following values:
  1025. * @arg OB_IWDG_SW: Software IWDG selected
  1026. * @arg OB_IWDG_HW: Hardware IWDG selected
  1027. * @param Stop: Reset event when entering STOP mode.
  1028. * This parameter can be one of the following values:
  1029. * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
  1030. * @arg OB_STOP_RST: Reset generated when entering in STOP
  1031. * @param Stdby: Reset event when entering Standby mode.
  1032. * This parameter can be one of the following values:
  1033. * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
  1034. * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
  1035. * @retval HAL Status
  1036. */
  1037. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
  1038. {
  1039. uint8_t optiontmp = 0xFF;
  1040. HAL_StatusTypeDef status = HAL_OK;
  1041. /* Check the parameters */
  1042. assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  1043. assert_param(IS_OB_STOP_SOURCE(Stop));
  1044. assert_param(IS_OB_STDBY_SOURCE(Stdby));
  1045. /* Wait for last operation to be completed */
  1046. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1047. if(status == HAL_OK)
  1048. {
  1049. /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
  1050. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
  1051. /* Update User Option Byte */
  1052. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
  1053. }
  1054. return status;
  1055. }
  1056. /**
  1057. * @brief Set the BOR Level.
  1058. * @param Level: specifies the Option Bytes BOR Reset Level.
  1059. * This parameter can be one of the following values:
  1060. * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1061. * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1062. * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1063. * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
  1064. * @retval HAL Status
  1065. */
  1066. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
  1067. {
  1068. /* Check the parameters */
  1069. assert_param(IS_OB_BOR_LEVEL(Level));
  1070. /* Set the BOR Level */
  1071. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  1072. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  1073. return HAL_OK;
  1074. }
  1075. /**
  1076. * @brief Return the FLASH User Option Byte value.
  1077. * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
  1078. * and RST_STDBY(Bit2).
  1079. */
  1080. static uint8_t FLASH_OB_GetUser(void)
  1081. {
  1082. /* Return the User Option Byte */
  1083. return ((uint8_t)(FLASH->OPTCR & 0xE0));
  1084. }
  1085. /**
  1086. * @brief Return the FLASH Write Protection Option Bytes value.
  1087. * @retval uint16_t FLASH Write Protection Option Bytes value
  1088. */
  1089. static uint16_t FLASH_OB_GetWRP(void)
  1090. {
  1091. /* Return the FLASH write protection Register value */
  1092. return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  1093. }
  1094. /**
  1095. * @brief Returns the FLASH Read Protection level.
  1096. * @retval FlagStatus FLASH Readout Protection Status:
  1097. * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
  1098. * - RESET, when OB_RDP_Level_0 is set
  1099. */
  1100. static FlagStatus FLASH_OB_GetRDP(void)
  1101. {
  1102. FlagStatus readstatus = RESET;
  1103. if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0))
  1104. {
  1105. readstatus = SET;
  1106. }
  1107. return readstatus;
  1108. }
  1109. /**
  1110. * @brief Returns the FLASH BOR level.
  1111. * @retval uint8_t The FLASH BOR level:
  1112. * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1113. * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1114. * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1115. * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
  1116. */
  1117. static uint8_t FLASH_OB_GetBOR(void)
  1118. {
  1119. /* Return the FLASH BOR level */
  1120. return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
  1121. }
  1122. /**
  1123. * @}
  1124. */
  1125. #endif /* HAL_FLASH_MODULE_ENABLED */
  1126. /**
  1127. * @}
  1128. */
  1129. /**
  1130. * @}
  1131. */
  1132. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/