stm32f4xx_hal_spdifrx.c 40 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_spdifrx.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the SPDIFRX audio interface:
  9. * + Initialization and Configuration
  10. * + Data transfers functions
  11. * + DMA transfers management
  12. * + Interrupts and flags management
  13. @verbatim
  14. ===============================================================================
  15. ##### How to use this driver #####
  16. ===============================================================================
  17. [..]
  18. The SPDIFRX HAL driver can be used as follow:
  19. (#) Declare SPDIFRX_HandleTypeDef handle structure.
  20. (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
  21. (##) Enable the SPDIFRX interface clock.
  22. (##) SPDIFRX pins configuration:
  23. (+++) Enable the clock for the SPDIFRX GPIOs.
  24. (+++) Configure these SPDIFRX pins as alternate function pull-up.
  25. (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
  26. (+++) Configure the SPDIFRX interrupt priority.
  27. (+++) Enable the NVIC SPDIFRX IRQ handle.
  28. (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
  29. (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
  30. (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
  31. (+++) Enable the DMAx interface clock.
  32. (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
  33. (+++) Configure the DMA Channel.
  34. (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
  35. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  36. DMA CtrlRx/DataRx channel.
  37. (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
  38. using HAL_SPDIFRX_Init() function.
  39. -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
  40. __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
  41. -@- Make sure that ck_spdif clock is configured.
  42. (#) Three operation modes are available within this driver :
  43. *** Polling mode for reception operation (for debug purpose) ***
  44. ================================================================
  45. [..]
  46. (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
  47. (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
  48. *** Interrupt mode for reception operation ***
  49. =========================================
  50. [..]
  51. (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
  52. (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
  53. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  54. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  55. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  56. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  57. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  58. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  59. *** DMA mode for reception operation ***
  60. ========================================
  61. [..]
  62. (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
  63. (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
  64. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  66. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  67. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  68. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  69. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  70. (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
  71. *** SPDIFRX HAL driver macros list ***
  72. =============================================
  73. [..]
  74. Below the list of most used macros in USART HAL driver.
  75. (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
  76. (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
  77. (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
  78. (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
  79. (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
  80. (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
  81. [..]
  82. (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
  83. @endverbatim
  84. ******************************************************************************
  85. * @attention
  86. *
  87. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  88. *
  89. * Redistribution and use in source and binary forms, with or without modification,
  90. * are permitted provided that the following conditions are met:
  91. * 1. Redistributions of source code must retain the above copyright notice,
  92. * this list of conditions and the following disclaimer.
  93. * 2. Redistributions in binary form must reproduce the above copyright notice,
  94. * this list of conditions and the following disclaimer in the documentation
  95. * and/or other materials provided with the distribution.
  96. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  97. * may be used to endorse or promote products derived from this software
  98. * without specific prior written permission.
  99. *
  100. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  101. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  102. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  103. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  104. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  105. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  106. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  107. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  108. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  109. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  110. *
  111. ******************************************************************************
  112. */
  113. /* Includes ------------------------------------------------------------------*/
  114. #include "stm32f4xx_hal.h"
  115. /** @addtogroup STM32F4xx_HAL_Driver
  116. * @{
  117. */
  118. /** @defgroup SPDIFRX SPDIFRX
  119. * @brief SPDIFRX HAL module driver
  120. * @{
  121. */
  122. #ifdef HAL_SPDIFRX_MODULE_ENABLED
  123. #if defined(STM32F446xx)
  124. /* Private typedef -----------------------------------------------------------*/
  125. /* Private define ------------------------------------------------------------*/
  126. #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
  127. /* Private macro -------------------------------------------------------------*/
  128. /* Private variables ---------------------------------------------------------*/
  129. /* Private function prototypes -----------------------------------------------*/
  130. /** @addtogroup SPDIFRX_Private_Functions
  131. * @{
  132. */
  133. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
  134. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  135. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
  136. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
  137. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
  138. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  139. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  140. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  141. /**
  142. * @}
  143. */
  144. /* Exported functions ---------------------------------------------------------*/
  145. /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
  146. * @{
  147. */
  148. /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
  149. * @brief Initialization and Configuration functions
  150. *
  151. @verbatim
  152. ===============================================================================
  153. ##### Initialization and de-initialization functions #####
  154. ===============================================================================
  155. [..] This subsection provides a set of functions allowing to initialize and
  156. de-initialize the SPDIFRX peripheral:
  157. (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
  158. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  159. (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
  160. the selected configuration:
  161. (++) Input Selection (IN0, IN1,...)
  162. (++) Maximum allowed re-tries during synchronization phase
  163. (++) Wait for activity on SPDIF selected input
  164. (++) Channel status selection (from channel A or B)
  165. (++) Data format (LSB, MSB, ...)
  166. (++) Stereo mode
  167. (++) User bits masking (PT,C,U,V,...)
  168. (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
  169. of the selected SPDIFRXx peripheral.
  170. @endverbatim
  171. * @{
  172. */
  173. /**
  174. * @brief Initializes the SPDIFRX according to the specified parameters
  175. * in the SPDIFRX_InitTypeDef and create the associated handle.
  176. * @param hspdif: SPDIFRX handle
  177. * @retval HAL status
  178. */
  179. HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
  180. {
  181. uint32_t tmpreg = 0;
  182. /* Check the SPDIFRX handle allocation */
  183. if(hspdif == NULL)
  184. {
  185. return HAL_ERROR;
  186. }
  187. /* Check the SPDIFRX parameters */
  188. assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
  189. assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
  190. assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
  191. assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
  192. assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
  193. assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
  194. assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
  195. assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
  196. assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
  197. assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
  198. if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
  199. {
  200. /* Allocate lock resource and initialize it */
  201. hspdif->Lock = HAL_UNLOCKED;
  202. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  203. HAL_SPDIFRX_MspInit(hspdif);
  204. }
  205. /* SPDIFRX peripheral state is BUSY*/
  206. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  207. /* Disable SPDIFRX interface (IDLE State) */
  208. __HAL_SPDIFRX_IDLE(hspdif);
  209. /* Reset the old SPDIFRX CR configuration */
  210. tmpreg = hspdif->Instance->CR;
  211. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  212. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
  213. SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
  214. SPDIFRX_CR_INSEL);
  215. /* Sets the new configuration of the SPDIFRX peripheral */
  216. tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
  217. hspdif->Init.InputSelection |
  218. hspdif->Init.Retries |
  219. hspdif->Init.WaitForActivity |
  220. hspdif->Init.ChannelSelection |
  221. hspdif->Init.DataFormat |
  222. hspdif->Init.PreambleTypeMask |
  223. hspdif->Init.ChannelStatusMask |
  224. hspdif->Init.ValidityBitMask |
  225. hspdif->Init.ParityErrorMask);
  226. hspdif->Instance->CR = tmpreg;
  227. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  228. /* SPDIFRX peripheral state is READY*/
  229. hspdif->State = HAL_SPDIFRX_STATE_READY;
  230. return HAL_OK;
  231. }
  232. /**
  233. * @brief DeInitializes the SPDIFRX peripheral
  234. * @param hspdif: SPDIFRX handle
  235. * @retval HAL status
  236. */
  237. HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
  238. {
  239. /* Check the SPDIFRX handle allocation */
  240. if(hspdif == NULL)
  241. {
  242. return HAL_ERROR;
  243. }
  244. /* Check the parameters */
  245. assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
  246. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  247. /* Disable SPDIFRX interface (IDLE state) */
  248. __HAL_SPDIFRX_IDLE(hspdif);
  249. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  250. HAL_SPDIFRX_MspDeInit(hspdif);
  251. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  252. /* SPDIFRX peripheral state is RESET*/
  253. hspdif->State = HAL_SPDIFRX_STATE_RESET;
  254. /* Release Lock */
  255. __HAL_UNLOCK(hspdif);
  256. return HAL_OK;
  257. }
  258. /**
  259. * @brief SPDIFRX MSP Init
  260. * @param hspdif: SPDIFRX handle
  261. * @retval None
  262. */
  263. __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
  264. {
  265. /* NOTE : This function Should not be modified, when the callback is needed,
  266. the HAL_SPDIFRX_MspInit could be implemented in the user file
  267. */
  268. }
  269. /**
  270. * @brief SPDIFRX MSP DeInit
  271. * @param hspdif: SPDIFRX handle
  272. * @retval None
  273. */
  274. __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
  275. {
  276. /* NOTE : This function Should not be modified, when the callback is needed,
  277. the HAL_SPDIFRX_MspDeInit could be implemented in the user file
  278. */
  279. }
  280. /**
  281. * @brief Sets the SPDIFRX dtat format according to the specified parameters
  282. * in the SPDIFRX_InitTypeDef.
  283. * @param hspdif: SPDIFRX handle
  284. * @param sDataFormat: SPDIFRX data format
  285. * @retval HAL status
  286. */
  287. HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
  288. {
  289. uint32_t tmpreg = 0;
  290. /* Check the SPDIFRX handle allocation */
  291. if(hspdif == NULL)
  292. {
  293. return HAL_ERROR;
  294. }
  295. /* Check the SPDIFRX parameters */
  296. assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
  297. assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
  298. assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
  299. assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
  300. assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
  301. assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
  302. /* Reset the old SPDIFRX CR configuration */
  303. tmpreg = hspdif->Instance->CR;
  304. if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
  305. (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
  306. ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
  307. {
  308. return HAL_ERROR;
  309. }
  310. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  311. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
  312. /* Sets the new configuration of the SPDIFRX peripheral */
  313. tmpreg |= ((uint16_t) sDataFormat.StereoMode |
  314. sDataFormat.DataFormat |
  315. sDataFormat.PreambleTypeMask |
  316. sDataFormat.ChannelStatusMask |
  317. sDataFormat.ValidityBitMask |
  318. sDataFormat.ParityErrorMask);
  319. hspdif->Instance->CR = tmpreg;
  320. return HAL_OK;
  321. }
  322. /**
  323. * @}
  324. */
  325. /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
  326. * @brief Data transfers functions
  327. *
  328. @verbatim
  329. ===============================================================================
  330. ##### IO operation functions #####
  331. ===============================================================================
  332. [..]
  333. This subsection provides a set of functions allowing to manage the SPDIFRX data
  334. transfers.
  335. (#) There is two mode of transfer:
  336. (++) Blocking mode : The communication is performed in the polling mode.
  337. The status of all data processing is returned by the same function
  338. after finishing transfer.
  339. (++) No-Blocking mode : The communication is performed using Interrupts
  340. or DMA. These functions return the status of the transfer start-up.
  341. The end of the data processing will be indicated through the
  342. dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
  343. using DMA mode.
  344. (#) Blocking mode functions are :
  345. (++) HAL_SPDIFRX_ReceiveDataFlow()
  346. (++) HAL_SPDIFRX_ReceiveControlFlow()
  347. (+@) Do not use blocking mode to receive both control and data flow at the same time.
  348. (#) No-Blocking mode functions with Interrupt are :
  349. (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
  350. (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
  351. (#) No-Blocking mode functions with DMA are :
  352. (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
  353. (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
  354. (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
  355. (++) HAL_SPDIFRX_RxCpltCallback()
  356. (++) HAL_SPDIFRX_ErrorCallback()
  357. @endverbatim
  358. * @{
  359. */
  360. /**
  361. * @brief Receives an amount of data (Data Flow) in blocking mode.
  362. * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
  363. * the configuration information for SPDIFRX module.
  364. * @param pData: Pointer to data buffer
  365. * @param Size: Amount of data to be received
  366. * @param Timeout: Timeout duration
  367. * @retval HAL status
  368. */
  369. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  370. {
  371. if((pData == NULL ) || (Size == 0))
  372. {
  373. return HAL_ERROR;
  374. }
  375. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  376. {
  377. /* Process Locked */
  378. __HAL_LOCK(hspdif);
  379. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  380. /* Start synchronisation */
  381. __HAL_SPDIFRX_SYNC(hspdif);
  382. /* Wait until SYNCD flag is set */
  383. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  384. {
  385. return HAL_TIMEOUT;
  386. }
  387. /* Start reception */
  388. __HAL_SPDIFRX_RCV(hspdif);
  389. /* Receive data flow */
  390. while(Size > 0)
  391. {
  392. /* Wait until RXNE flag is set */
  393. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  394. {
  395. return HAL_TIMEOUT;
  396. }
  397. (*pData++) = hspdif->Instance->DR;
  398. Size--;
  399. }
  400. /* SPDIFRX ready */
  401. hspdif->State = HAL_SPDIFRX_STATE_READY;
  402. /* Process Unlocked */
  403. __HAL_UNLOCK(hspdif);
  404. return HAL_OK;
  405. }
  406. else
  407. {
  408. return HAL_BUSY;
  409. }
  410. }
  411. /**
  412. * @brief Receives an amount of data (Control Flow) in blocking mode.
  413. * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
  414. * the configuration information for SPDIFRX module.
  415. * @param pData: Pointer to data buffer
  416. * @param Size: Amount of data to be received
  417. * @param Timeout: Timeout duration
  418. * @retval HAL status
  419. */
  420. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  421. {
  422. if((pData == NULL ) || (Size == 0))
  423. {
  424. return HAL_ERROR;
  425. }
  426. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  427. {
  428. /* Process Locked */
  429. __HAL_LOCK(hspdif);
  430. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  431. /* Start synchronization */
  432. __HAL_SPDIFRX_SYNC(hspdif);
  433. /* Wait until SYNCD flag is set */
  434. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  435. {
  436. return HAL_TIMEOUT;
  437. }
  438. /* Start reception */
  439. __HAL_SPDIFRX_RCV(hspdif);
  440. /* Receive control flow */
  441. while(Size > 0)
  442. {
  443. /* Wait until CSRNE flag is set */
  444. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
  445. {
  446. return HAL_TIMEOUT;
  447. }
  448. (*pData++) = hspdif->Instance->CSR;
  449. Size--;
  450. }
  451. /* SPDIFRX ready */
  452. hspdif->State = HAL_SPDIFRX_STATE_READY;
  453. /* Process Unlocked */
  454. __HAL_UNLOCK(hspdif);
  455. return HAL_OK;
  456. }
  457. else
  458. {
  459. return HAL_BUSY;
  460. }
  461. }
  462. /**
  463. * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
  464. * @param hspdif: SPDIFRX handle
  465. * @param pData: a 32-bit pointer to the Receive data buffer.
  466. * @param Size: number of data sample to be received .
  467. * @retval HAL status
  468. */
  469. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  470. {
  471. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  472. {
  473. if((pData == NULL) || (Size == 0))
  474. {
  475. return HAL_ERROR;
  476. }
  477. /* Process Locked */
  478. __HAL_LOCK(hspdif);
  479. hspdif->pRxBuffPtr = pData;
  480. hspdif->RxXferSize = Size;
  481. hspdif->RxXferCount = Size;
  482. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  483. /* Check if a receive process is ongoing or not */
  484. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  485. /* Enable the SPDIFRX PE Error Interrupt */
  486. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  487. /* Enable the SPDIFRX OVR Error Interrupt */
  488. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  489. /* Process Unlocked */
  490. __HAL_UNLOCK(hspdif);
  491. /* Enable the SPDIFRX RXNE interrupt */
  492. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  493. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
  494. {
  495. /* Start synchronization */
  496. __HAL_SPDIFRX_SYNC(hspdif);
  497. /* Wait until SYNCD flag is set */
  498. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  499. {
  500. return HAL_TIMEOUT;
  501. }
  502. /* Start reception */
  503. __HAL_SPDIFRX_RCV(hspdif);
  504. }
  505. return HAL_OK;
  506. }
  507. else
  508. {
  509. return HAL_BUSY;
  510. }
  511. }
  512. /**
  513. * @brief Receive an amount of data (Control Flow) with Interrupt
  514. * @param hspdif: SPDIFRX handle
  515. * @param pData: a 32-bit pointer to the Receive data buffer.
  516. * @param Size: number of data sample (Control Flow) to be received :
  517. * @retval HAL status
  518. */
  519. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  520. {
  521. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  522. {
  523. if((pData == NULL ) || (Size == 0))
  524. {
  525. return HAL_ERROR;
  526. }
  527. /* Process Locked */
  528. __HAL_LOCK(hspdif);
  529. hspdif->pCsBuffPtr = pData;
  530. hspdif->CsXferSize = Size;
  531. hspdif->CsXferCount = Size;
  532. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  533. /* Check if a receive process is ongoing or not */
  534. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  535. /* Enable the SPDIFRX PE Error Interrupt */
  536. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  537. /* Enable the SPDIFRX OVR Error Interrupt */
  538. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  539. /* Process Unlocked */
  540. __HAL_UNLOCK(hspdif);
  541. /* Enable the SPDIFRX CSRNE interrupt */
  542. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  543. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
  544. {
  545. /* Start synchronization */
  546. __HAL_SPDIFRX_SYNC(hspdif);
  547. /* Wait until SYNCD flag is set */
  548. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  549. {
  550. return HAL_TIMEOUT;
  551. }
  552. /* Start reception */
  553. __HAL_SPDIFRX_RCV(hspdif);
  554. }
  555. return HAL_OK;
  556. }
  557. else
  558. {
  559. return HAL_BUSY;
  560. }
  561. }
  562. /**
  563. * @brief Receive an amount of data (Data Flow) mode with DMA
  564. * @param hspdif: SPDIFRX handle
  565. * @param pData: a 32-bit pointer to the Receive data buffer.
  566. * @param Size: number of data sample to be received :
  567. * @retval HAL status
  568. */
  569. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  570. {
  571. if((pData == NULL) || (Size == 0))
  572. {
  573. return HAL_ERROR;
  574. }
  575. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  576. {
  577. hspdif->pRxBuffPtr = pData;
  578. hspdif->RxXferSize = Size;
  579. hspdif->RxXferCount = Size;
  580. /* Process Locked */
  581. __HAL_LOCK(hspdif);
  582. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  583. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  584. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  585. hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
  586. /* Set the SPDIFRX Rx DMA transfer complete callback */
  587. hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
  588. /* Set the DMA error callback */
  589. hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
  590. /* Enable the DMA request */
  591. HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
  592. /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
  593. hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
  594. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
  595. {
  596. /* Start synchronization */
  597. __HAL_SPDIFRX_SYNC(hspdif);
  598. /* Wait until SYNCD flag is set */
  599. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  600. {
  601. return HAL_TIMEOUT;
  602. }
  603. /* Start reception */
  604. __HAL_SPDIFRX_RCV(hspdif);
  605. }
  606. /* Process Unlocked */
  607. __HAL_UNLOCK(hspdif);
  608. return HAL_OK;
  609. }
  610. else
  611. {
  612. return HAL_BUSY;
  613. }
  614. }
  615. /**
  616. * @brief Receive an amount of data (Control Flow) with DMA
  617. * @param hspdif: SPDIFRX handle
  618. * @param pData: a 32-bit pointer to the Receive data buffer.
  619. * @param Size: number of data (Control Flow) sample to be received :
  620. * @retval HAL status
  621. */
  622. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  623. {
  624. if((pData == NULL) || (Size == 0))
  625. {
  626. return HAL_ERROR;
  627. }
  628. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  629. {
  630. hspdif->pCsBuffPtr = pData;
  631. hspdif->CsXferSize = Size;
  632. hspdif->CsXferCount = Size;
  633. /* Process Locked */
  634. __HAL_LOCK(hspdif);
  635. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  636. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  637. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  638. hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
  639. /* Set the SPDIFRX Rx DMA transfer complete callback */
  640. hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
  641. /* Set the DMA error callback */
  642. hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
  643. /* Enable the DMA request */
  644. HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
  645. /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
  646. hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
  647. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
  648. {
  649. /* Start synchronization */
  650. __HAL_SPDIFRX_SYNC(hspdif);
  651. /* Wait until SYNCD flag is set */
  652. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  653. {
  654. return HAL_TIMEOUT;
  655. }
  656. /* Start reception */
  657. __HAL_SPDIFRX_RCV(hspdif);
  658. }
  659. /* Process Unlocked */
  660. __HAL_UNLOCK(hspdif);
  661. return HAL_OK;
  662. }
  663. else
  664. {
  665. return HAL_BUSY;
  666. }
  667. }
  668. /**
  669. * @brief stop the audio stream receive from the Media.
  670. * @param hspdif: SPDIFRX handle
  671. * @retval None
  672. */
  673. HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
  674. {
  675. /* Process Locked */
  676. __HAL_LOCK(hspdif);
  677. /* Disable the SPDIFRX DMA requests */
  678. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  679. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  680. /* Disable the SPDIFRX DMA channel */
  681. __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
  682. __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
  683. /* Disable SPDIFRX peripheral */
  684. __HAL_SPDIFRX_IDLE(hspdif);
  685. hspdif->State = HAL_SPDIFRX_STATE_READY;
  686. /* Process Unlocked */
  687. __HAL_UNLOCK(hspdif);
  688. return HAL_OK;
  689. }
  690. /**
  691. * @brief This function handles SPDIFRX interrupt request.
  692. * @param hspdif: SPDIFRX handle
  693. * @retval HAL status
  694. */
  695. void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
  696. {
  697. /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
  698. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
  699. {
  700. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
  701. SPDIFRX_ReceiveDataFlow_IT(hspdif);
  702. }
  703. /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
  704. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
  705. {
  706. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
  707. SPDIFRX_ReceiveControlFlow_IT(hspdif);
  708. }
  709. /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
  710. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
  711. {
  712. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
  713. /* Change the SPDIFRX error code */
  714. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
  715. /* the transfer is not stopped */
  716. HAL_SPDIFRX_ErrorCallback(hspdif);
  717. }
  718. /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
  719. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
  720. {
  721. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
  722. /* Change the SPDIFRX error code */
  723. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
  724. /* the transfer is not stopped */
  725. HAL_SPDIFRX_ErrorCallback(hspdif);
  726. }
  727. }
  728. /**
  729. * @brief Rx Transfer (Data flow) half completed callbacks
  730. * @param hspdif: SPDIFRX handle
  731. * @retval None
  732. */
  733. __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  734. {
  735. /* NOTE : This function Should not be modified, when the callback is needed,
  736. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  737. */
  738. }
  739. /**
  740. * @brief Rx Transfer (Data flow) completed callbacks
  741. * @param hspdif: SPDIFRX handle
  742. * @retval None
  743. */
  744. __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  745. {
  746. /* NOTE : This function Should not be modified, when the callback is needed,
  747. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  748. */
  749. }
  750. /**
  751. * @brief Rx (Control flow) Transfer half completed callbacks
  752. * @param hspdif: SPDIFRX handle
  753. * @retval None
  754. */
  755. __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  756. {
  757. /* NOTE : This function Should not be modified, when the callback is needed,
  758. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  759. */
  760. }
  761. /**
  762. * @brief Rx Transfer (Control flow) completed callbacks
  763. * @param hspdif: SPDIFRX handle
  764. * @retval None
  765. */
  766. __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  767. {
  768. /* NOTE : This function Should not be modified, when the callback is needed,
  769. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  770. */
  771. }
  772. /**
  773. * @brief SPDIFRX error callbacks
  774. * @param hspdif: SPDIFRX handle
  775. * @retval None
  776. */
  777. __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
  778. {
  779. /* NOTE : This function Should not be modified, when the callback is needed,
  780. the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
  781. */
  782. }
  783. /**
  784. * @}
  785. */
  786. /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
  787. * @brief Peripheral State functions
  788. *
  789. @verbatim
  790. ===============================================================================
  791. ##### Peripheral State and Errors functions #####
  792. ===============================================================================
  793. [..]
  794. This subsection permit to get in run-time the status of the peripheral
  795. and the data flow.
  796. @endverbatim
  797. * @{
  798. */
  799. /**
  800. * @brief Return the SPDIFRX state
  801. * @param hspdif : SPDIFRX handle
  802. * @retval HAL state
  803. */
  804. HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
  805. {
  806. return hspdif->State;
  807. }
  808. /**
  809. * @brief Return the SPDIFRX error code
  810. * @param hspdif : SPDIFRX handle
  811. * @retval SPDIFRX Error Code
  812. */
  813. uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
  814. {
  815. return hspdif->ErrorCode;
  816. }
  817. /**
  818. * @}
  819. */
  820. /**
  821. * @brief DMA SPDIFRX receive process (Data flow) complete callback
  822. * @param hdma : DMA handle
  823. * @retval None
  824. */
  825. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
  826. {
  827. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  828. /* Disable Rx DMA Request */
  829. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  830. hspdif->RxXferCount = 0;
  831. hspdif->State = HAL_SPDIFRX_STATE_READY;
  832. HAL_SPDIFRX_RxCpltCallback(hspdif);
  833. }
  834. /**
  835. * @brief DMA SPDIFRX receive process (Data flow) half complete callback
  836. * @param hdma : DMA handle
  837. * @retval None
  838. */
  839. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  840. {
  841. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  842. HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
  843. }
  844. /**
  845. * @brief DMA SPDIFRX receive process (Control flow) complete callback
  846. * @param hdma : DMA handle
  847. * @retval None
  848. */
  849. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
  850. {
  851. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  852. /* Disable Cb DMA Request */
  853. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  854. hspdif->CsXferCount = 0;
  855. hspdif->State = HAL_SPDIFRX_STATE_READY;
  856. HAL_SPDIFRX_CxCpltCallback(hspdif);
  857. }
  858. /**
  859. * @brief DMA SPDIFRX receive process (Control flow) half complete callback
  860. * @param hdma : DMA handle
  861. * @retval None
  862. */
  863. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
  864. {
  865. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  866. HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
  867. }
  868. /**
  869. * @brief DMA SPDIFRX communication error callback
  870. * @param hdma : DMA handle
  871. * @retval None
  872. */
  873. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
  874. {
  875. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  876. /* Disable Rx and Cb DMA Request */
  877. hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
  878. hspdif->RxXferCount = 0;
  879. hspdif->State= HAL_SPDIFRX_STATE_READY;
  880. /* Set the error code and execute error callback*/
  881. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
  882. HAL_SPDIFRX_ErrorCallback(hspdif);
  883. }
  884. /**
  885. * @brief Receive an amount of data (Data Flow) with Interrupt
  886. * @param hspdif: SPDIFRX handle
  887. * @retval None
  888. */
  889. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  890. {
  891. /* Receive data */
  892. (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
  893. hspdif->RxXferCount--;
  894. if(hspdif->RxXferCount == 0)
  895. {
  896. /* Disable RXNE/PE and OVR interrupts */
  897. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
  898. hspdif->State = HAL_SPDIFRX_STATE_READY;
  899. /* Process Unlocked */
  900. __HAL_UNLOCK(hspdif);
  901. HAL_SPDIFRX_RxCpltCallback(hspdif);
  902. }
  903. }
  904. /**
  905. * @brief Receive an amount of data (Control Flow) with Interrupt
  906. * @param hspdif: SPDIFRX handle
  907. * @retval None
  908. */
  909. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  910. {
  911. /* Receive data */
  912. (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
  913. hspdif->CsXferCount--;
  914. if(hspdif->CsXferCount == 0)
  915. {
  916. /* Disable CSRNE interrupt */
  917. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  918. hspdif->State = HAL_SPDIFRX_STATE_READY;
  919. /* Process Unlocked */
  920. __HAL_UNLOCK(hspdif);
  921. HAL_SPDIFRX_CxCpltCallback(hspdif);
  922. }
  923. }
  924. /**
  925. * @brief This function handles SPDIFRX Communication Timeout.
  926. * @param hspdif: SPDIFRX handle
  927. * @param Flag: Flag checked
  928. * @param Status: Value of the flag expected
  929. * @param Timeout: Duration of the timeout
  930. * @retval HAL status
  931. */
  932. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  933. {
  934. uint32_t tickstart = 0;
  935. /* Get tick */
  936. tickstart = HAL_GetTick();
  937. /* Wait until flag is set */
  938. if(Status == RESET)
  939. {
  940. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
  941. {
  942. /* Check for the Timeout */
  943. if(Timeout != HAL_MAX_DELAY)
  944. {
  945. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  946. {
  947. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  948. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  949. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  950. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  951. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  952. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  953. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  954. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  955. hspdif->State= HAL_SPDIFRX_STATE_READY;
  956. /* Process Unlocked */
  957. __HAL_UNLOCK(hspdif);
  958. return HAL_TIMEOUT;
  959. }
  960. }
  961. }
  962. }
  963. else
  964. {
  965. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
  966. {
  967. /* Check for the Timeout */
  968. if(Timeout != HAL_MAX_DELAY)
  969. {
  970. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  971. {
  972. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  973. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  974. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  975. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  976. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  977. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  978. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  979. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  980. hspdif->State= HAL_SPDIFRX_STATE_READY;
  981. /* Process Unlocked */
  982. __HAL_UNLOCK(hspdif);
  983. return HAL_TIMEOUT;
  984. }
  985. }
  986. }
  987. }
  988. return HAL_OK;
  989. }
  990. /**
  991. * @}
  992. */
  993. #endif /* STM32F446xx */
  994. #endif /* HAL_SPDIFRX_MODULE_ENABLED */
  995. /**
  996. * @}
  997. */
  998. /**
  999. * @}
  1000. */
  1001. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/