stm32f4xx_hal_spi.c 69 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_spi.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 09-March-2015
  7. * @brief SPI HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The SPI HAL driver can be used as follows:
  21. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  22. SPI_HandleTypeDef hspi;
  23. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  24. (##) Enable the SPIx interface clock
  25. (##) SPI pins configuration
  26. (+++) Enable the clock for the SPI GPIOs
  27. (+++) Configure these SPI pins as alternate function push-pull
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the SPIx interrupt priority
  30. (+++) Enable the NVIC SPI IRQ handle
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
  33. (+++) Enable the DMAx interface clock using
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Stream
  36. (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream
  38. (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  39. management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  40. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  41. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  42. by calling the customized HAL_SPI_MspInit() API.
  43. [..]
  44. Circular mode restriction:
  45. (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  46. (##) Master 2Lines RxOnly
  47. (##) Master 1Line Rx
  48. (#) The CRC feature is not managed when the DMA circular mode is enabled
  49. (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  50. the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  51. @endverbatim
  52. ******************************************************************************
  53. * @attention
  54. *
  55. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  56. *
  57. * Redistribution and use in source and binary forms, with or without modification,
  58. * are permitted provided that the following conditions are met:
  59. * 1. Redistributions of source code must retain the above copyright notice,
  60. * this list of conditions and the following disclaimer.
  61. * 2. Redistributions in binary form must reproduce the above copyright notice,
  62. * this list of conditions and the following disclaimer in the documentation
  63. * and/or other materials provided with the distribution.
  64. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  65. * may be used to endorse or promote products derived from this software
  66. * without specific prior written permission.
  67. *
  68. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  69. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  70. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  71. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  72. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  73. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  74. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  75. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  76. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  77. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78. *
  79. ******************************************************************************
  80. */
  81. /* Includes ------------------------------------------------------------------*/
  82. #include "stm32f4xx_hal.h"
  83. /** @addtogroup STM32F4xx_HAL_Driver
  84. * @{
  85. */
  86. /** @defgroup SPI SPI
  87. * @brief SPI HAL module driver
  88. * @{
  89. */
  90. #ifdef HAL_SPI_MODULE_ENABLED
  91. /* Private typedef -----------------------------------------------------------*/
  92. /* Private define ------------------------------------------------------------*/
  93. #define SPI_TIMEOUT_VALUE 10
  94. /* Private macro -------------------------------------------------------------*/
  95. /* Private variables ---------------------------------------------------------*/
  96. /* Private function prototypes -----------------------------------------------*/
  97. /** @addtogroup SPI_Private_Functions
  98. * @{
  99. */
  100. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  101. static void SPI_TxISR(SPI_HandleTypeDef *hspi);
  102. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  103. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
  104. static void SPI_RxISR(SPI_HandleTypeDef *hspi);
  105. static void SPI_DMAEndTransmitReceive(SPI_HandleTypeDef *hspi);
  106. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  107. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  108. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  109. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
  110. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
  111. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  112. static void SPI_DMAError(DMA_HandleTypeDef *hdma);
  113. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  114. /**
  115. * @}
  116. */
  117. /* Exported functions --------------------------------------------------------*/
  118. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  119. * @{
  120. */
  121. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  122. * @brief Initialization and Configuration functions
  123. *
  124. @verbatim
  125. ===============================================================================
  126. ##### Initialization and de-initialization functions #####
  127. ===============================================================================
  128. [..] This subsection provides a set of functions allowing to initialize and
  129. de-initialize the SPIx peripheral:
  130. (+) User must implement HAL_SPI_MspInit() function in which he configures
  131. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  132. (+) Call the function HAL_SPI_Init() to configure the selected device with
  133. the selected configuration:
  134. (++) Mode
  135. (++) Direction
  136. (++) Data Size
  137. (++) Clock Polarity and Phase
  138. (++) NSS Management
  139. (++) BaudRate Prescaler
  140. (++) FirstBit
  141. (++) TIMode
  142. (++) CRC Calculation
  143. (++) CRC Polynomial if CRC enabled
  144. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  145. of the selected SPIx peripheral.
  146. @endverbatim
  147. * @{
  148. */
  149. /**
  150. * @brief Initializes the SPI according to the specified parameters
  151. * in the SPI_InitTypeDef and create the associated handle.
  152. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  153. * the configuration information for SPI module.
  154. * @retval HAL status
  155. */
  156. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  157. {
  158. /* Check the SPI handle allocation */
  159. if(hspi == NULL)
  160. {
  161. return HAL_ERROR;
  162. }
  163. /* Check the parameters */
  164. assert_param(IS_SPI_MODE(hspi->Init.Mode));
  165. assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
  166. assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  167. assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  168. assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  169. assert_param(IS_SPI_NSS(hspi->Init.NSS));
  170. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  171. assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  172. assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  173. assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
  174. assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  175. if(hspi->State == HAL_SPI_STATE_RESET)
  176. {
  177. /* Allocate lock resource and initialize it */
  178. hspi->Lock = HAL_UNLOCKED;
  179. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  180. HAL_SPI_MspInit(hspi);
  181. }
  182. hspi->State = HAL_SPI_STATE_BUSY;
  183. /* Disable the selected SPI peripheral */
  184. __HAL_SPI_DISABLE(hspi);
  185. /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  186. /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  187. Communication speed, First bit and CRC calculation state */
  188. hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
  189. hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
  190. hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation);
  191. /* Configure : NSS management */
  192. hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode);
  193. /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
  194. /* Configure : CRC Polynomial */
  195. hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
  196. /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  197. hspi->Instance->I2SCFGR &= (uint32_t)(~SPI_I2SCFGR_I2SMOD);
  198. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  199. hspi->State = HAL_SPI_STATE_READY;
  200. return HAL_OK;
  201. }
  202. /**
  203. * @brief DeInitializes the SPI peripheral
  204. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  205. * the configuration information for SPI module.
  206. * @retval HAL status
  207. */
  208. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  209. {
  210. /* Check the SPI handle allocation */
  211. if(hspi == NULL)
  212. {
  213. return HAL_ERROR;
  214. }
  215. /* Disable the SPI Peripheral Clock */
  216. __HAL_SPI_DISABLE(hspi);
  217. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  218. HAL_SPI_MspDeInit(hspi);
  219. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  220. hspi->State = HAL_SPI_STATE_RESET;
  221. /* Release Lock */
  222. __HAL_UNLOCK(hspi);
  223. return HAL_OK;
  224. }
  225. /**
  226. * @brief SPI MSP Init
  227. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  228. * the configuration information for SPI module.
  229. * @retval None
  230. */
  231. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  232. {
  233. /* NOTE : This function Should not be modified, when the callback is needed,
  234. the HAL_SPI_MspInit could be implemented in the user file
  235. */
  236. }
  237. /**
  238. * @brief SPI MSP DeInit
  239. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  240. * the configuration information for SPI module.
  241. * @retval None
  242. */
  243. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  244. {
  245. /* NOTE : This function Should not be modified, when the callback is needed,
  246. the HAL_SPI_MspDeInit could be implemented in the user file
  247. */
  248. }
  249. /**
  250. * @}
  251. */
  252. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  253. * @brief Data transfers functions
  254. *
  255. @verbatim
  256. ==============================================================================
  257. ##### IO operation functions #####
  258. ===============================================================================
  259. This subsection provides a set of functions allowing to manage the SPI
  260. data transfers.
  261. [..] The SPI supports master and slave mode :
  262. (#) There are two modes of transfer:
  263. (++) Blocking mode: The communication is performed in polling mode.
  264. The HAL status of all data processing is returned by the same function
  265. after finishing transfer.
  266. (++) No-Blocking mode: The communication is performed using Interrupts
  267. or DMA, These APIs return the HAL status.
  268. The end of the data processing will be indicated through the
  269. dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  270. using DMA mode.
  271. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  272. will be executed respectively at the end of the transmit or Receive process
  273. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  274. (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
  275. exist for 1Line (simplex) and 2Lines (full duplex) modes.
  276. @endverbatim
  277. * @{
  278. */
  279. /**
  280. * @brief Transmit an amount of data in blocking mode
  281. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  282. * the configuration information for SPI module.
  283. * @param pData: pointer to data buffer
  284. * @param Size: amount of data to be sent
  285. * @param Timeout: Timeout duration
  286. * @retval HAL status
  287. */
  288. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  289. {
  290. if(hspi->State == HAL_SPI_STATE_READY)
  291. {
  292. if((pData == NULL ) || (Size == 0))
  293. {
  294. return HAL_ERROR;
  295. }
  296. /* Check the parameters */
  297. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  298. /* Process Locked */
  299. __HAL_LOCK(hspi);
  300. /* Configure communication */
  301. hspi->State = HAL_SPI_STATE_BUSY_TX;
  302. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  303. hspi->pTxBuffPtr = pData;
  304. hspi->TxXferSize = Size;
  305. hspi->TxXferCount = Size;
  306. /*Init field not used in handle to zero */
  307. hspi->TxISR = 0;
  308. hspi->RxISR = 0;
  309. hspi->RxXferSize = 0;
  310. hspi->RxXferCount = 0;
  311. /* Reset CRC Calculation */
  312. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  313. {
  314. SPI_RESET_CRC(hspi);
  315. }
  316. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  317. {
  318. /* Configure communication direction : 1Line */
  319. SPI_1LINE_TX(hspi);
  320. }
  321. /* Check if the SPI is already enabled */
  322. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  323. {
  324. /* Enable SPI peripheral */
  325. __HAL_SPI_ENABLE(hspi);
  326. }
  327. /* Transmit data in 8 Bit mode */
  328. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  329. {
  330. if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
  331. {
  332. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  333. hspi->TxXferCount--;
  334. }
  335. while(hspi->TxXferCount > 0)
  336. {
  337. /* Wait until TXE flag is set to send data */
  338. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  339. {
  340. return HAL_TIMEOUT;
  341. }
  342. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  343. hspi->TxXferCount--;
  344. }
  345. /* Enable CRC Transmission */
  346. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  347. {
  348. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  349. }
  350. }
  351. /* Transmit data in 16 Bit mode */
  352. else
  353. {
  354. if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
  355. {
  356. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  357. hspi->pTxBuffPtr+=2;
  358. hspi->TxXferCount--;
  359. }
  360. while(hspi->TxXferCount > 0)
  361. {
  362. /* Wait until TXE flag is set to send data */
  363. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  364. {
  365. return HAL_TIMEOUT;
  366. }
  367. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  368. hspi->pTxBuffPtr+=2;
  369. hspi->TxXferCount--;
  370. }
  371. /* Enable CRC Transmission */
  372. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  373. {
  374. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  375. }
  376. }
  377. /* Wait until TXE flag is set to send data */
  378. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  379. {
  380. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  381. return HAL_TIMEOUT;
  382. }
  383. /* Wait until Busy flag is reset before disabling SPI */
  384. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  385. {
  386. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  387. return HAL_TIMEOUT;
  388. }
  389. /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
  390. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  391. {
  392. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  393. }
  394. hspi->State = HAL_SPI_STATE_READY;
  395. /* Process Unlocked */
  396. __HAL_UNLOCK(hspi);
  397. return HAL_OK;
  398. }
  399. else
  400. {
  401. return HAL_BUSY;
  402. }
  403. }
  404. /**
  405. * @brief Receive an amount of data in blocking mode
  406. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  407. * the configuration information for SPI module.
  408. * @param pData: pointer to data buffer
  409. * @param Size: amount of data to be sent
  410. * @param Timeout: Timeout duration
  411. * @retval HAL status
  412. */
  413. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  414. {
  415. __IO uint16_t tmpreg;
  416. uint32_t tmp = 0;
  417. if(hspi->State == HAL_SPI_STATE_READY)
  418. {
  419. if((pData == NULL ) || (Size == 0))
  420. {
  421. return HAL_ERROR;
  422. }
  423. /* Process Locked */
  424. __HAL_LOCK(hspi);
  425. /* Configure communication */
  426. hspi->State = HAL_SPI_STATE_BUSY_RX;
  427. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  428. hspi->pRxBuffPtr = pData;
  429. hspi->RxXferSize = Size;
  430. hspi->RxXferCount = Size;
  431. /*Init field not used in handle to zero */
  432. hspi->RxISR = 0;
  433. hspi->TxISR = 0;
  434. hspi->TxXferSize = 0;
  435. hspi->TxXferCount = 0;
  436. /* Configure communication direction : 1Line */
  437. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  438. {
  439. SPI_1LINE_RX(hspi);
  440. }
  441. /* Reset CRC Calculation */
  442. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  443. {
  444. SPI_RESET_CRC(hspi);
  445. }
  446. if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  447. {
  448. /* Process Unlocked */
  449. __HAL_UNLOCK(hspi);
  450. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  451. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  452. }
  453. /* Check if the SPI is already enabled */
  454. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  455. {
  456. /* Enable SPI peripheral */
  457. __HAL_SPI_ENABLE(hspi);
  458. }
  459. /* Receive data in 8 Bit mode */
  460. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  461. {
  462. while(hspi->RxXferCount > 1)
  463. {
  464. /* Wait until RXNE flag is set */
  465. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  466. {
  467. return HAL_TIMEOUT;
  468. }
  469. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  470. hspi->RxXferCount--;
  471. }
  472. /* Enable CRC Transmission */
  473. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  474. {
  475. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  476. }
  477. }
  478. /* Receive data in 16 Bit mode */
  479. else
  480. {
  481. while(hspi->RxXferCount > 1)
  482. {
  483. /* Wait until RXNE flag is set to read data */
  484. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  485. {
  486. return HAL_TIMEOUT;
  487. }
  488. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  489. hspi->pRxBuffPtr+=2;
  490. hspi->RxXferCount--;
  491. }
  492. /* Enable CRC Transmission */
  493. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  494. {
  495. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  496. }
  497. }
  498. /* Wait until RXNE flag is set */
  499. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  500. {
  501. return HAL_TIMEOUT;
  502. }
  503. /* Receive last data in 8 Bit mode */
  504. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  505. {
  506. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  507. }
  508. /* Receive last data in 16 Bit mode */
  509. else
  510. {
  511. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  512. hspi->pRxBuffPtr+=2;
  513. }
  514. hspi->RxXferCount--;
  515. /* Wait until RXNE flag is set: CRC Received */
  516. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  517. {
  518. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  519. {
  520. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  521. return HAL_TIMEOUT;
  522. }
  523. /* Read CRC to Flush RXNE flag */
  524. tmpreg = hspi->Instance->DR;
  525. UNUSED(tmpreg);
  526. }
  527. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  528. {
  529. /* Disable SPI peripheral */
  530. __HAL_SPI_DISABLE(hspi);
  531. }
  532. hspi->State = HAL_SPI_STATE_READY;
  533. tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
  534. /* Check if CRC error occurred */
  535. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (tmp != RESET))
  536. {
  537. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  538. /* Reset CRC Calculation */
  539. SPI_RESET_CRC(hspi);
  540. /* Process Unlocked */
  541. __HAL_UNLOCK(hspi);
  542. return HAL_ERROR;
  543. }
  544. /* Process Unlocked */
  545. __HAL_UNLOCK(hspi);
  546. return HAL_OK;
  547. }
  548. else
  549. {
  550. return HAL_BUSY;
  551. }
  552. }
  553. /**
  554. * @brief Transmit and Receive an amount of data in blocking mode
  555. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  556. * the configuration information for SPI module.
  557. * @param pTxData: pointer to transmission data buffer
  558. * @param pRxData: pointer to reception data buffer to be
  559. * @param Size: amount of data to be sent
  560. * @param Timeout: Timeout duration
  561. * @retval HAL status
  562. */
  563. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  564. {
  565. __IO uint16_t tmpreg;
  566. uint32_t tmpstate = 0, tmp = 0;
  567. tmpstate = hspi->State;
  568. if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX))
  569. {
  570. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  571. {
  572. return HAL_ERROR;
  573. }
  574. /* Check the parameters */
  575. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  576. /* Process Locked */
  577. __HAL_LOCK(hspi);
  578. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  579. if(hspi->State == HAL_SPI_STATE_READY)
  580. {
  581. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  582. }
  583. /* Configure communication */
  584. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  585. hspi->pRxBuffPtr = pRxData;
  586. hspi->RxXferSize = Size;
  587. hspi->RxXferCount = Size;
  588. hspi->pTxBuffPtr = pTxData;
  589. hspi->TxXferSize = Size;
  590. hspi->TxXferCount = Size;
  591. /*Init field not used in handle to zero */
  592. hspi->RxISR = 0;
  593. hspi->TxISR = 0;
  594. /* Reset CRC Calculation */
  595. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  596. {
  597. SPI_RESET_CRC(hspi);
  598. }
  599. /* Check if the SPI is already enabled */
  600. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  601. {
  602. /* Enable SPI peripheral */
  603. __HAL_SPI_ENABLE(hspi);
  604. }
  605. /* Transmit and Receive data in 16 Bit mode */
  606. if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  607. {
  608. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  609. {
  610. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  611. hspi->pTxBuffPtr+=2;
  612. hspi->TxXferCount--;
  613. }
  614. if(hspi->TxXferCount == 0)
  615. {
  616. /* Enable CRC Transmission */
  617. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  618. {
  619. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  620. }
  621. /* Wait until RXNE flag is set */
  622. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  623. {
  624. return HAL_TIMEOUT;
  625. }
  626. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  627. hspi->pRxBuffPtr+=2;
  628. hspi->RxXferCount--;
  629. }
  630. else
  631. {
  632. while(hspi->TxXferCount > 0)
  633. {
  634. /* Wait until TXE flag is set to send data */
  635. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  636. {
  637. return HAL_TIMEOUT;
  638. }
  639. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  640. hspi->pTxBuffPtr+=2;
  641. hspi->TxXferCount--;
  642. /* Enable CRC Transmission */
  643. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  644. {
  645. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  646. }
  647. /* Wait until RXNE flag is set */
  648. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  649. {
  650. return HAL_TIMEOUT;
  651. }
  652. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  653. hspi->pRxBuffPtr+=2;
  654. hspi->RxXferCount--;
  655. }
  656. /* Receive the last byte */
  657. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  658. {
  659. /* Wait until RXNE flag is set */
  660. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  661. {
  662. return HAL_TIMEOUT;
  663. }
  664. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  665. hspi->pRxBuffPtr+=2;
  666. hspi->RxXferCount--;
  667. }
  668. }
  669. }
  670. /* Transmit and Receive data in 8 Bit mode */
  671. else
  672. {
  673. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  674. {
  675. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  676. hspi->TxXferCount--;
  677. }
  678. if(hspi->TxXferCount == 0)
  679. {
  680. /* Enable CRC Transmission */
  681. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  682. {
  683. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  684. }
  685. /* Wait until RXNE flag is set */
  686. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  687. {
  688. return HAL_TIMEOUT;
  689. }
  690. (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  691. hspi->RxXferCount--;
  692. }
  693. else
  694. {
  695. while(hspi->TxXferCount > 0)
  696. {
  697. /* Wait until TXE flag is set to send data */
  698. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  699. {
  700. return HAL_TIMEOUT;
  701. }
  702. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  703. hspi->TxXferCount--;
  704. /* Enable CRC Transmission */
  705. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  706. {
  707. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  708. }
  709. /* Wait until RXNE flag is set */
  710. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  711. {
  712. return HAL_TIMEOUT;
  713. }
  714. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  715. hspi->RxXferCount--;
  716. }
  717. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  718. {
  719. /* Wait until RXNE flag is set */
  720. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  721. {
  722. return HAL_TIMEOUT;
  723. }
  724. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  725. hspi->RxXferCount--;
  726. }
  727. }
  728. }
  729. /* Read CRC from DR to close CRC calculation process */
  730. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  731. {
  732. /* Wait until RXNE flag is set */
  733. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  734. {
  735. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  736. return HAL_TIMEOUT;
  737. }
  738. /* Read CRC */
  739. tmpreg = hspi->Instance->DR;
  740. UNUSED(tmpreg);
  741. }
  742. /* Wait until Busy flag is reset before disabling SPI */
  743. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  744. {
  745. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  746. return HAL_TIMEOUT;
  747. }
  748. hspi->State = HAL_SPI_STATE_READY;
  749. tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
  750. /* Check if CRC error occurred */
  751. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (tmp != RESET))
  752. {
  753. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  754. /* Reset CRC Calculation */
  755. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  756. {
  757. SPI_RESET_CRC(hspi);
  758. }
  759. /* Process Unlocked */
  760. __HAL_UNLOCK(hspi);
  761. return HAL_ERROR;
  762. }
  763. /* Process Unlocked */
  764. __HAL_UNLOCK(hspi);
  765. return HAL_OK;
  766. }
  767. else
  768. {
  769. return HAL_BUSY;
  770. }
  771. }
  772. /**
  773. * @brief Transmit an amount of data in no-blocking mode with Interrupt
  774. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  775. * the configuration information for SPI module.
  776. * @param pData: pointer to data buffer
  777. * @param Size: amount of data to be sent
  778. * @retval HAL status
  779. */
  780. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  781. {
  782. if(hspi->State == HAL_SPI_STATE_READY)
  783. {
  784. if((pData == NULL) || (Size == 0))
  785. {
  786. return HAL_ERROR;
  787. }
  788. /* Check the parameters */
  789. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  790. /* Process Locked */
  791. __HAL_LOCK(hspi);
  792. /* Configure communication */
  793. hspi->State = HAL_SPI_STATE_BUSY_TX;
  794. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  795. hspi->TxISR = &SPI_TxISR;
  796. hspi->pTxBuffPtr = pData;
  797. hspi->TxXferSize = Size;
  798. hspi->TxXferCount = Size;
  799. /*Init field not used in handle to zero */
  800. hspi->RxISR = 0;
  801. hspi->RxXferSize = 0;
  802. hspi->RxXferCount = 0;
  803. /* Configure communication direction : 1Line */
  804. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  805. {
  806. SPI_1LINE_TX(hspi);
  807. }
  808. /* Reset CRC Calculation */
  809. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  810. {
  811. SPI_RESET_CRC(hspi);
  812. }
  813. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  814. {
  815. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  816. }else
  817. {
  818. /* Enable TXE and ERR interrupt */
  819. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  820. }
  821. /* Process Unlocked */
  822. __HAL_UNLOCK(hspi);
  823. /* Check if the SPI is already enabled */
  824. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  825. {
  826. /* Enable SPI peripheral */
  827. __HAL_SPI_ENABLE(hspi);
  828. }
  829. return HAL_OK;
  830. }
  831. else
  832. {
  833. return HAL_BUSY;
  834. }
  835. }
  836. /**
  837. * @brief Receive an amount of data in no-blocking mode with Interrupt
  838. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  839. * the configuration information for SPI module.
  840. * @param pData: pointer to data buffer
  841. * @param Size: amount of data to be sent
  842. * @retval HAL status
  843. */
  844. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  845. {
  846. if(hspi->State == HAL_SPI_STATE_READY)
  847. {
  848. if((pData == NULL) || (Size == 0))
  849. {
  850. return HAL_ERROR;
  851. }
  852. /* Process Locked */
  853. __HAL_LOCK(hspi);
  854. /* Configure communication */
  855. hspi->State = HAL_SPI_STATE_BUSY_RX;
  856. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  857. hspi->RxISR = &SPI_RxISR;
  858. hspi->pRxBuffPtr = pData;
  859. hspi->RxXferSize = Size;
  860. hspi->RxXferCount = Size ;
  861. /*Init field not used in handle to zero */
  862. hspi->TxISR = 0;
  863. hspi->TxXferSize = 0;
  864. hspi->TxXferCount = 0;
  865. /* Configure communication direction : 1Line */
  866. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  867. {
  868. SPI_1LINE_RX(hspi);
  869. }
  870. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  871. {
  872. /* Process Unlocked */
  873. __HAL_UNLOCK(hspi);
  874. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  875. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  876. }
  877. /* Reset CRC Calculation */
  878. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  879. {
  880. SPI_RESET_CRC(hspi);
  881. }
  882. /* Enable TXE and ERR interrupt */
  883. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  884. /* Process Unlocked */
  885. __HAL_UNLOCK(hspi);
  886. /* Note : The SPI must be enabled after unlocking current process
  887. to avoid the risk of SPI interrupt handle execution before current
  888. process unlock */
  889. /* Check if the SPI is already enabled */
  890. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  891. {
  892. /* Enable SPI peripheral */
  893. __HAL_SPI_ENABLE(hspi);
  894. }
  895. return HAL_OK;
  896. }
  897. else
  898. {
  899. return HAL_BUSY;
  900. }
  901. }
  902. /**
  903. * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
  904. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  905. * the configuration information for SPI module.
  906. * @param pTxData: pointer to transmission data buffer
  907. * @param pRxData: pointer to reception data buffer to be
  908. * @param Size: amount of data to be sent
  909. * @retval HAL status
  910. */
  911. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  912. {
  913. uint32_t tmpstate = 0;
  914. tmpstate = hspi->State;
  915. if((tmpstate == HAL_SPI_STATE_READY) || \
  916. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
  917. {
  918. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  919. {
  920. return HAL_ERROR;
  921. }
  922. /* Check the parameters */
  923. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  924. /* Process locked */
  925. __HAL_LOCK(hspi);
  926. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  927. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  928. {
  929. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  930. }
  931. /* Configure communication */
  932. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  933. hspi->TxISR = &SPI_TxISR;
  934. hspi->pTxBuffPtr = pTxData;
  935. hspi->TxXferSize = Size;
  936. hspi->TxXferCount = Size;
  937. hspi->RxISR = &SPI_2LinesRxISR;
  938. hspi->pRxBuffPtr = pRxData;
  939. hspi->RxXferSize = Size;
  940. hspi->RxXferCount = Size;
  941. /* Reset CRC Calculation */
  942. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  943. {
  944. SPI_RESET_CRC(hspi);
  945. }
  946. /* Enable TXE, RXNE and ERR interrupt */
  947. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  948. /* Process Unlocked */
  949. __HAL_UNLOCK(hspi);
  950. /* Check if the SPI is already enabled */
  951. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  952. {
  953. /* Enable SPI peripheral */
  954. __HAL_SPI_ENABLE(hspi);
  955. }
  956. return HAL_OK;
  957. }
  958. else
  959. {
  960. return HAL_BUSY;
  961. }
  962. }
  963. /**
  964. * @brief Transmit an amount of data in no-blocking mode with DMA
  965. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  966. * the configuration information for SPI module.
  967. * @param pData: pointer to data buffer
  968. * @param Size: amount of data to be sent
  969. * @retval HAL status
  970. */
  971. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  972. {
  973. if(hspi->State == HAL_SPI_STATE_READY)
  974. {
  975. if((pData == NULL) || (Size == 0))
  976. {
  977. return HAL_ERROR;
  978. }
  979. /* Check the parameters */
  980. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  981. /* Process Locked */
  982. __HAL_LOCK(hspi);
  983. /* Configure communication */
  984. hspi->State = HAL_SPI_STATE_BUSY_TX;
  985. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  986. hspi->pTxBuffPtr = pData;
  987. hspi->TxXferSize = Size;
  988. hspi->TxXferCount = Size;
  989. /*Init field not used in handle to zero */
  990. hspi->TxISR = 0;
  991. hspi->RxISR = 0;
  992. hspi->RxXferSize = 0;
  993. hspi->RxXferCount = 0;
  994. /* Configure communication direction : 1Line */
  995. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  996. {
  997. SPI_1LINE_TX(hspi);
  998. }
  999. /* Reset CRC Calculation */
  1000. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1001. {
  1002. SPI_RESET_CRC(hspi);
  1003. }
  1004. /* Set the SPI TxDMA Half transfer complete callback */
  1005. hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  1006. /* Set the SPI TxDMA transfer complete callback */
  1007. hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  1008. /* Set the DMA error callback */
  1009. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1010. /* Enable the Tx DMA Stream */
  1011. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1012. /* Process Unlocked */
  1013. __HAL_UNLOCK(hspi);
  1014. /* Check if the SPI is already enabled */
  1015. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1016. {
  1017. /* Enable SPI peripheral */
  1018. __HAL_SPI_ENABLE(hspi);
  1019. }
  1020. /* Enable Tx DMA Request */
  1021. hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
  1022. return HAL_OK;
  1023. }
  1024. else
  1025. {
  1026. return HAL_BUSY;
  1027. }
  1028. }
  1029. /**
  1030. * @brief Receive an amount of data in no-blocking mode with DMA
  1031. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1032. * the configuration information for SPI module.
  1033. * @param pData: pointer to data buffer
  1034. * @note When the CRC feature is enabled the pData Length must be Size + 1.
  1035. * @param Size: amount of data to be sent
  1036. * @retval HAL status
  1037. */
  1038. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1039. {
  1040. if(hspi->State == HAL_SPI_STATE_READY)
  1041. {
  1042. if((pData == NULL) || (Size == 0))
  1043. {
  1044. return HAL_ERROR;
  1045. }
  1046. /* Process Locked */
  1047. __HAL_LOCK(hspi);
  1048. /* Configure communication */
  1049. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1050. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1051. hspi->pRxBuffPtr = pData;
  1052. hspi->RxXferSize = Size;
  1053. hspi->RxXferCount = Size;
  1054. /*Init field not used in handle to zero */
  1055. hspi->RxISR = 0;
  1056. hspi->TxISR = 0;
  1057. hspi->TxXferSize = 0;
  1058. hspi->TxXferCount = 0;
  1059. /* Configure communication direction : 1Line */
  1060. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1061. {
  1062. SPI_1LINE_RX(hspi);
  1063. }
  1064. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1065. {
  1066. /* Process Unlocked */
  1067. __HAL_UNLOCK(hspi);
  1068. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1069. return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1070. }
  1071. /* Reset CRC Calculation */
  1072. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1073. {
  1074. SPI_RESET_CRC(hspi);
  1075. }
  1076. /* Set the SPI RxDMA Half transfer complete callback */
  1077. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1078. /* Set the SPI Rx DMA transfer complete callback */
  1079. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1080. /* Set the DMA error callback */
  1081. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1082. /* Enable the Rx DMA Stream */
  1083. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1084. /* Process Unlocked */
  1085. __HAL_UNLOCK(hspi);
  1086. /* Check if the SPI is already enabled */
  1087. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1088. {
  1089. /* Enable SPI peripheral */
  1090. __HAL_SPI_ENABLE(hspi);
  1091. }
  1092. /* Enable Rx DMA Request */
  1093. hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
  1094. return HAL_OK;
  1095. }
  1096. else
  1097. {
  1098. return HAL_BUSY;
  1099. }
  1100. }
  1101. /**
  1102. * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
  1103. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1104. * the configuration information for SPI module.
  1105. * @param pTxData: pointer to transmission data buffer
  1106. * @param pRxData: pointer to reception data buffer
  1107. * @note When the CRC feature is enabled the pRxData Length must be Size + 1
  1108. * @param Size: amount of data to be sent
  1109. * @retval HAL status
  1110. */
  1111. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1112. {
  1113. uint32_t tmpstate = 0;
  1114. tmpstate = hspi->State;
  1115. if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \
  1116. (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
  1117. {
  1118. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1119. {
  1120. return HAL_ERROR;
  1121. }
  1122. /* Check the parameters */
  1123. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1124. /* Process locked */
  1125. __HAL_LOCK(hspi);
  1126. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1127. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1128. {
  1129. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1130. }
  1131. /* Configure communication */
  1132. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1133. hspi->pTxBuffPtr = (uint8_t*)pTxData;
  1134. hspi->TxXferSize = Size;
  1135. hspi->TxXferCount = Size;
  1136. hspi->pRxBuffPtr = (uint8_t*)pRxData;
  1137. hspi->RxXferSize = Size;
  1138. hspi->RxXferCount = Size;
  1139. /*Init field not used in handle to zero */
  1140. hspi->RxISR = 0;
  1141. hspi->TxISR = 0;
  1142. /* Reset CRC Calculation */
  1143. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1144. {
  1145. SPI_RESET_CRC(hspi);
  1146. }
  1147. /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1148. if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1149. {
  1150. /* Set the SPI Rx DMA Half transfer complete callback */
  1151. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1152. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1153. }
  1154. else
  1155. {
  1156. /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1157. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1158. hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1159. }
  1160. /* Set the DMA error callback */
  1161. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1162. /* Enable the Rx DMA Stream */
  1163. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1164. /* Enable Rx DMA Request */
  1165. hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
  1166. /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1167. is performed in DMA reception complete callback */
  1168. hspi->hdmatx->XferCpltCallback = NULL;
  1169. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1170. {
  1171. /* Set the DMA error callback */
  1172. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1173. }
  1174. else
  1175. {
  1176. hspi->hdmatx->XferErrorCallback = NULL;
  1177. }
  1178. /* Enable the Tx DMA Stream */
  1179. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1180. /* Process Unlocked */
  1181. __HAL_UNLOCK(hspi);
  1182. /* Check if the SPI is already enabled */
  1183. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1184. {
  1185. /* Enable SPI peripheral */
  1186. __HAL_SPI_ENABLE(hspi);
  1187. }
  1188. /* Enable Tx DMA Request */
  1189. hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
  1190. return HAL_OK;
  1191. }
  1192. else
  1193. {
  1194. return HAL_BUSY;
  1195. }
  1196. }
  1197. /**
  1198. * @brief Pauses the DMA Transfer.
  1199. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1200. * the configuration information for the specified SPI module.
  1201. * @retval HAL status
  1202. */
  1203. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1204. {
  1205. /* Process Locked */
  1206. __HAL_LOCK(hspi);
  1207. /* Disable the SPI DMA Tx & Rx requests */
  1208. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  1209. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  1210. /* Process Unlocked */
  1211. __HAL_UNLOCK(hspi);
  1212. return HAL_OK;
  1213. }
  1214. /**
  1215. * @brief Resumes the DMA Transfer.
  1216. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1217. * the configuration information for the specified SPI module.
  1218. * @retval HAL status
  1219. */
  1220. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1221. {
  1222. /* Process Locked */
  1223. __HAL_LOCK(hspi);
  1224. /* Enable the SPI DMA Tx & Rx requests */
  1225. hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
  1226. hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
  1227. /* Process Unlocked */
  1228. __HAL_UNLOCK(hspi);
  1229. return HAL_OK;
  1230. }
  1231. /**
  1232. * @brief Stops the DMA Transfer.
  1233. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1234. * the configuration information for the specified SPI module.
  1235. * @retval HAL status
  1236. */
  1237. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1238. {
  1239. /* The Lock is not implemented on this API to allow the user application
  1240. to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1241. when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1242. and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1243. */
  1244. /* Abort the SPI DMA tx Stream */
  1245. if(hspi->hdmatx != NULL)
  1246. {
  1247. HAL_DMA_Abort(hspi->hdmatx);
  1248. }
  1249. /* Abort the SPI DMA rx Stream */
  1250. if(hspi->hdmarx != NULL)
  1251. {
  1252. HAL_DMA_Abort(hspi->hdmarx);
  1253. }
  1254. /* Disable the SPI DMA Tx & Rx requests */
  1255. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  1256. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  1257. hspi->State = HAL_SPI_STATE_READY;
  1258. return HAL_OK;
  1259. }
  1260. /**
  1261. * @brief This function handles SPI interrupt request.
  1262. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1263. * the configuration information for SPI module.
  1264. * @retval HAL status
  1265. */
  1266. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1267. {
  1268. uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
  1269. tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE);
  1270. tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE);
  1271. tmp3 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR);
  1272. /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1273. if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET))
  1274. {
  1275. hspi->RxISR(hspi);
  1276. return;
  1277. }
  1278. tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE);
  1279. tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE);
  1280. /* SPI in mode Transmitter ---------------------------------------------------*/
  1281. if((tmp1 != RESET) && (tmp2 != RESET))
  1282. {
  1283. hspi->TxISR(hspi);
  1284. return;
  1285. }
  1286. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1287. {
  1288. /* SPI CRC error interrupt occurred ---------------------------------------*/
  1289. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1290. {
  1291. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  1292. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1293. }
  1294. /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1295. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1296. {
  1297. hspi->ErrorCode |= HAL_SPI_ERROR_MODF;
  1298. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1299. }
  1300. /* SPI Overrun error interrupt occurred -----------------------------------*/
  1301. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1302. {
  1303. if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1304. {
  1305. hspi->ErrorCode |= HAL_SPI_ERROR_OVR;
  1306. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1307. }
  1308. }
  1309. /* SPI Frame error interrupt occurred -------------------------------------*/
  1310. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
  1311. {
  1312. hspi->ErrorCode |= HAL_SPI_ERROR_FRE;
  1313. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1314. }
  1315. /* Call the Error call Back in case of Errors */
  1316. if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1317. {
  1318. hspi->State = HAL_SPI_STATE_READY;
  1319. HAL_SPI_ErrorCallback(hspi);
  1320. }
  1321. }
  1322. }
  1323. /**
  1324. * @brief Tx Transfer completed callbacks
  1325. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1326. * the configuration information for SPI module.
  1327. * @retval None
  1328. */
  1329. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1330. {
  1331. /* NOTE : This function Should not be modified, when the callback is needed,
  1332. the HAL_SPI_TxCpltCallback could be implemented in the user file
  1333. */
  1334. }
  1335. /**
  1336. * @brief Rx Transfer completed callbacks
  1337. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1338. * the configuration information for SPI module.
  1339. * @retval None
  1340. */
  1341. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1342. {
  1343. /* NOTE : This function Should not be modified, when the callback is needed,
  1344. the HAL_SPI_RxCpltCallback() could be implemented in the user file
  1345. */
  1346. }
  1347. /**
  1348. * @brief Tx and Rx Transfer completed callbacks
  1349. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1350. * the configuration information for SPI module.
  1351. * @retval None
  1352. */
  1353. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1354. {
  1355. /* NOTE : This function Should not be modified, when the callback is needed,
  1356. the HAL_SPI_TxRxCpltCallback() could be implemented in the user file
  1357. */
  1358. }
  1359. /**
  1360. * @brief Tx Half Transfer completed callbacks
  1361. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1362. * the configuration information for SPI module.
  1363. * @retval None
  1364. */
  1365. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1366. {
  1367. /* NOTE : This function Should not be modified, when the callback is needed,
  1368. the HAL_SPI_TxHalfCpltCallback could be implemented in the user file
  1369. */
  1370. }
  1371. /**
  1372. * @brief Rx Half Transfer completed callbacks
  1373. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1374. * the configuration information for SPI module.
  1375. * @retval None
  1376. */
  1377. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1378. {
  1379. /* NOTE : This function Should not be modified, when the callback is needed,
  1380. the HAL_SPI_RxHalfCpltCallback() could be implemented in the user file
  1381. */
  1382. }
  1383. /**
  1384. * @brief Tx and Rx Transfer completed callbacks
  1385. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1386. * the configuration information for SPI module.
  1387. * @retval None
  1388. */
  1389. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1390. {
  1391. /* NOTE : This function Should not be modified, when the callback is needed,
  1392. the HAL_SPI_TxRxHalfCpltCallback() could be implemented in the user file
  1393. */
  1394. }
  1395. /**
  1396. * @brief SPI error callbacks
  1397. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1398. * the configuration information for SPI module.
  1399. * @retval None
  1400. */
  1401. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1402. {
  1403. /* NOTE : - This function Should not be modified, when the callback is needed,
  1404. the HAL_SPI_ErrorCallback() could be implemented in the user file.
  1405. - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1406. and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1407. */
  1408. }
  1409. /**
  1410. * @}
  1411. */
  1412. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1413. * @brief SPI control functions
  1414. *
  1415. @verbatim
  1416. ===============================================================================
  1417. ##### Peripheral State and Errors functions #####
  1418. ===============================================================================
  1419. [..]
  1420. This subsection provides a set of functions allowing to control the SPI.
  1421. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1422. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1423. @endverbatim
  1424. * @{
  1425. */
  1426. /**
  1427. * @brief Return the SPI state
  1428. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1429. * the configuration information for SPI module.
  1430. * @retval HAL state
  1431. */
  1432. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1433. {
  1434. return hspi->State;
  1435. }
  1436. /**
  1437. * @brief Return the SPI error code
  1438. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1439. * the configuration information for SPI module.
  1440. * @retval SPI Error Code
  1441. */
  1442. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1443. {
  1444. return hspi->ErrorCode;
  1445. }
  1446. /**
  1447. * @}
  1448. */
  1449. /**
  1450. * @brief Interrupt Handler to close Tx transfer
  1451. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1452. * the configuration information for SPI module.
  1453. * @retval void
  1454. */
  1455. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1456. {
  1457. /* Wait until TXE flag is set to send data */
  1458. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1459. {
  1460. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1461. }
  1462. /* Disable TXE interrupt */
  1463. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
  1464. /* Disable ERR interrupt if Receive process is finished */
  1465. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1466. {
  1467. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1468. /* Wait until Busy flag is reset before disabling SPI */
  1469. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1470. {
  1471. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1472. }
  1473. /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
  1474. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1475. {
  1476. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1477. }
  1478. /* Check if Errors has been detected during transfer */
  1479. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1480. {
  1481. /* Check if we are in Tx or in Rx/Tx Mode */
  1482. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1483. {
  1484. /* Set state to READY before run the Callback Complete */
  1485. hspi->State = HAL_SPI_STATE_READY;
  1486. HAL_SPI_TxRxCpltCallback(hspi);
  1487. }
  1488. else
  1489. {
  1490. /* Set state to READY before run the Callback Complete */
  1491. hspi->State = HAL_SPI_STATE_READY;
  1492. HAL_SPI_TxCpltCallback(hspi);
  1493. }
  1494. }
  1495. else
  1496. {
  1497. /* Set state to READY before run the Callback Complete */
  1498. hspi->State = HAL_SPI_STATE_READY;
  1499. /* Call Error call back in case of Error */
  1500. HAL_SPI_ErrorCallback(hspi);
  1501. }
  1502. }
  1503. }
  1504. /**
  1505. * @brief Interrupt Handler to transmit amount of data in no-blocking mode
  1506. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1507. * the configuration information for SPI module.
  1508. * @retval void
  1509. */
  1510. static void SPI_TxISR(SPI_HandleTypeDef *hspi)
  1511. {
  1512. /* Transmit data in 8 Bit mode */
  1513. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1514. {
  1515. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1516. }
  1517. /* Transmit data in 16 Bit mode */
  1518. else
  1519. {
  1520. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1521. hspi->pTxBuffPtr+=2;
  1522. }
  1523. hspi->TxXferCount--;
  1524. if(hspi->TxXferCount == 0)
  1525. {
  1526. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1527. {
  1528. /* calculate and transfer CRC on Tx line */
  1529. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  1530. }
  1531. SPI_TxCloseIRQHandler(hspi);
  1532. }
  1533. }
  1534. /**
  1535. * @brief Interrupt Handler to close Rx transfer
  1536. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1537. * the configuration information for SPI module.
  1538. * @retval void
  1539. */
  1540. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1541. {
  1542. __IO uint16_t tmpreg;
  1543. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1544. {
  1545. /* Wait until RXNE flag is set to send data */
  1546. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1547. {
  1548. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1549. }
  1550. /* Read CRC to reset RXNE flag */
  1551. tmpreg = hspi->Instance->DR;
  1552. UNUSED(tmpreg);
  1553. /* Wait until RXNE flag is set to send data */
  1554. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1555. {
  1556. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1557. }
  1558. /* Check if CRC error occurred */
  1559. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1560. {
  1561. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  1562. /* Reset CRC Calculation */
  1563. SPI_RESET_CRC(hspi);
  1564. }
  1565. }
  1566. /* Disable RXNE and ERR interrupt */
  1567. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1568. /* if Transmit process is finished */
  1569. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1570. {
  1571. /* Disable ERR interrupt */
  1572. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1573. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1574. {
  1575. /* Disable SPI peripheral */
  1576. __HAL_SPI_DISABLE(hspi);
  1577. }
  1578. /* Check if Errors has been detected during transfer */
  1579. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1580. {
  1581. /* Check if we are in Rx or in Rx/Tx Mode */
  1582. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1583. {
  1584. /* Set state to READY before run the Callback Complete */
  1585. hspi->State = HAL_SPI_STATE_READY;
  1586. HAL_SPI_TxRxCpltCallback(hspi);
  1587. }
  1588. else
  1589. {
  1590. /* Set state to READY before run the Callback Complete */
  1591. hspi->State = HAL_SPI_STATE_READY;
  1592. HAL_SPI_RxCpltCallback(hspi);
  1593. }
  1594. }
  1595. else
  1596. {
  1597. /* Set state to READY before run the Callback Complete */
  1598. hspi->State = HAL_SPI_STATE_READY;
  1599. /* Call Error call back in case of Error */
  1600. HAL_SPI_ErrorCallback(hspi);
  1601. }
  1602. }
  1603. }
  1604. /**
  1605. * @brief Interrupt Handler to receive amount of data in 2Lines mode
  1606. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1607. * the configuration information for SPI module.
  1608. * @retval void
  1609. */
  1610. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
  1611. {
  1612. /* Receive data in 8 Bit mode */
  1613. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1614. {
  1615. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1616. }
  1617. /* Receive data in 16 Bit mode */
  1618. else
  1619. {
  1620. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1621. hspi->pRxBuffPtr+=2;
  1622. }
  1623. hspi->RxXferCount--;
  1624. if(hspi->RxXferCount==0)
  1625. {
  1626. SPI_RxCloseIRQHandler(hspi);
  1627. }
  1628. }
  1629. /**
  1630. * @brief Interrupt Handler to receive amount of data in no-blocking mode
  1631. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1632. * the configuration information for SPI module.
  1633. * @retval void
  1634. */
  1635. static void SPI_RxISR(SPI_HandleTypeDef *hspi)
  1636. {
  1637. /* Receive data in 8 Bit mode */
  1638. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1639. {
  1640. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1641. }
  1642. /* Receive data in 16 Bit mode */
  1643. else
  1644. {
  1645. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1646. hspi->pRxBuffPtr+=2;
  1647. }
  1648. hspi->RxXferCount--;
  1649. /* Enable CRC Transmission */
  1650. if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1651. {
  1652. /* Set CRC Next to calculate CRC on Rx side */
  1653. hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
  1654. }
  1655. if(hspi->RxXferCount == 0)
  1656. {
  1657. SPI_RxCloseIRQHandler(hspi);
  1658. }
  1659. }
  1660. /**
  1661. * @brief DMA SPI transmit process complete callback
  1662. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1663. * the configuration information for the specified DMA module.
  1664. * @retval None
  1665. */
  1666. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  1667. {
  1668. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1669. /* DMA Normal Mode */
  1670. if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
  1671. {
  1672. /* Wait until TXE flag is set to send data */
  1673. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1674. {
  1675. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1676. }
  1677. /* Disable Tx DMA Request */
  1678. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  1679. /* Wait until Busy flag is reset before disabling SPI */
  1680. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1681. {
  1682. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1683. }
  1684. hspi->TxXferCount = 0;
  1685. hspi->State = HAL_SPI_STATE_READY;
  1686. }
  1687. /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
  1688. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1689. {
  1690. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1691. }
  1692. /* Check if Errors has been detected during transfer */
  1693. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1694. {
  1695. HAL_SPI_ErrorCallback(hspi);
  1696. }
  1697. else
  1698. {
  1699. HAL_SPI_TxCpltCallback(hspi);
  1700. }
  1701. }
  1702. /**
  1703. * @brief DMA SPI receive process complete callback
  1704. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1705. * the configuration information for the specified DMA module.
  1706. * @retval None
  1707. */
  1708. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  1709. {
  1710. __IO uint16_t tmpreg;
  1711. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1712. /* DMA Normal mode */
  1713. if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
  1714. {
  1715. if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1716. {
  1717. SPI_DMAEndTransmitReceive(hspi);
  1718. }
  1719. /* SPI_DIRECTION_1LINE or SPI_DIRECTION_2LINES_RXONLY */
  1720. else
  1721. {
  1722. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1723. {
  1724. /* Disable SPI peripheral */
  1725. __HAL_SPI_DISABLE(hspi);
  1726. }
  1727. /* Disable Rx DMA Request */
  1728. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  1729. hspi->RxXferCount = 0;
  1730. /* Reset CRC Calculation */
  1731. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1732. {
  1733. /* Wait until RXNE flag is set to send data */
  1734. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1735. {
  1736. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1737. }
  1738. /* Read CRC */
  1739. tmpreg = hspi->Instance->DR;
  1740. UNUSED(tmpreg);
  1741. /* Wait until RXNE flag is set */
  1742. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1743. {
  1744. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1745. }
  1746. /* Check if CRC error occurred */
  1747. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1748. {
  1749. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  1750. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1751. }
  1752. }
  1753. }
  1754. hspi->State = HAL_SPI_STATE_READY;
  1755. /* Check if Errors has been detected during transfer */
  1756. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1757. {
  1758. HAL_SPI_ErrorCallback(hspi);
  1759. }
  1760. else
  1761. {
  1762. HAL_SPI_RxCpltCallback(hspi);
  1763. }
  1764. }
  1765. else
  1766. {
  1767. HAL_SPI_RxCpltCallback(hspi);
  1768. }
  1769. }
  1770. /**
  1771. * @brief End DMA SPI transmit receive process
  1772. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1773. * the configuration information for SPI module.
  1774. * @retval None
  1775. */
  1776. static void SPI_DMAEndTransmitReceive(SPI_HandleTypeDef *hspi)
  1777. {
  1778. __IO uint16_t tmpreg;
  1779. /* Reset CRC Calculation */
  1780. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1781. {
  1782. /* Check if CRC is done on going (RXNE flag set) */
  1783. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  1784. {
  1785. /* Wait until RXNE flag is set to send data */
  1786. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1787. {
  1788. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1789. }
  1790. }
  1791. /* Read CRC */
  1792. tmpreg = hspi->Instance->DR;
  1793. UNUSED(tmpreg);
  1794. /* Check if CRC error occurred */
  1795. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1796. {
  1797. hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
  1798. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1799. }
  1800. }
  1801. /* Wait until TXE flag is set to send data */
  1802. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1803. {
  1804. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1805. }
  1806. /* Disable Tx DMA Request */
  1807. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  1808. /* Wait until Busy flag is reset before disabling SPI */
  1809. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1810. {
  1811. hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
  1812. }
  1813. /* Disable Rx DMA Request */
  1814. hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  1815. hspi->TxXferCount = 0;
  1816. hspi->RxXferCount = 0;
  1817. }
  1818. /**
  1819. * @brief DMA SPI transmit receive process complete callback
  1820. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1821. * the configuration information for the specified DMA module.
  1822. * @retval None
  1823. */
  1824. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1825. {
  1826. __IO uint16_t tmpreg;
  1827. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1828. if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
  1829. { /**/
  1830. SPI_DMAEndTransmitReceive(hspi);
  1831. hspi->State = HAL_SPI_STATE_READY;
  1832. /* Check if Errors has been detected during transfer */
  1833. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1834. {
  1835. HAL_SPI_ErrorCallback(hspi);
  1836. }
  1837. else
  1838. {
  1839. HAL_SPI_TxRxCpltCallback(hspi);
  1840. }
  1841. }
  1842. else
  1843. {
  1844. HAL_SPI_TxRxCpltCallback(hspi);
  1845. }
  1846. }
  1847. /**
  1848. * @brief DMA SPI half transmit process complete callback
  1849. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1850. * the configuration information for the specified DMA module.
  1851. * @retval None
  1852. */
  1853. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
  1854. {
  1855. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1856. HAL_SPI_TxHalfCpltCallback(hspi);
  1857. }
  1858. /**
  1859. * @brief DMA SPI half receive process complete callback
  1860. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1861. * the configuration information for the specified DMA module.
  1862. * @retval None
  1863. */
  1864. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
  1865. {
  1866. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1867. HAL_SPI_RxHalfCpltCallback(hspi);
  1868. }
  1869. /**
  1870. * @brief DMA SPI Half transmit receive process complete callback
  1871. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1872. * the configuration information for the specified DMA module.
  1873. * @retval None
  1874. */
  1875. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1876. {
  1877. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1878. HAL_SPI_TxRxHalfCpltCallback(hspi);
  1879. }
  1880. /**
  1881. * @brief DMA SPI communication error callback
  1882. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1883. * the configuration information for the specified DMA module.
  1884. * @retval None
  1885. */
  1886. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  1887. {
  1888. SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1889. hspi->TxXferCount = 0;
  1890. hspi->RxXferCount = 0;
  1891. hspi->State= HAL_SPI_STATE_READY;
  1892. hspi->ErrorCode |= HAL_SPI_ERROR_DMA;
  1893. HAL_SPI_ErrorCallback(hspi);
  1894. }
  1895. /**
  1896. * @brief This function handles SPI Communication Timeout.
  1897. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1898. * the configuration information for SPI module.
  1899. * @param Flag: SPI flag to check
  1900. * @param Status: Flag status to check: RESET or set
  1901. * @param Timeout: Timeout duration
  1902. * @retval HAL status
  1903. */
  1904. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1905. {
  1906. uint32_t tickstart = 0;
  1907. /* Get tick */
  1908. tickstart = HAL_GetTick();
  1909. /* Wait until flag is set */
  1910. if(Status == RESET)
  1911. {
  1912. while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  1913. {
  1914. if(Timeout != HAL_MAX_DELAY)
  1915. {
  1916. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1917. {
  1918. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1919. on both master and slave sides in order to resynchronize the master
  1920. and slave for their respective CRC calculation */
  1921. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1922. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1923. /* Disable SPI peripheral */
  1924. __HAL_SPI_DISABLE(hspi);
  1925. /* Reset CRC Calculation */
  1926. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1927. {
  1928. SPI_RESET_CRC(hspi);
  1929. }
  1930. hspi->State= HAL_SPI_STATE_READY;
  1931. /* Process Unlocked */
  1932. __HAL_UNLOCK(hspi);
  1933. return HAL_TIMEOUT;
  1934. }
  1935. }
  1936. }
  1937. }
  1938. else
  1939. {
  1940. while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  1941. {
  1942. if(Timeout != HAL_MAX_DELAY)
  1943. {
  1944. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1945. {
  1946. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1947. on both master and slave sides in order to resynchronize the master
  1948. and slave for their respective CRC calculation */
  1949. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1950. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1951. /* Disable SPI peripheral */
  1952. __HAL_SPI_DISABLE(hspi);
  1953. /* Reset CRC Calculation */
  1954. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1955. {
  1956. SPI_RESET_CRC(hspi);
  1957. }
  1958. hspi->State= HAL_SPI_STATE_READY;
  1959. /* Process Unlocked */
  1960. __HAL_UNLOCK(hspi);
  1961. return HAL_TIMEOUT;
  1962. }
  1963. }
  1964. }
  1965. }
  1966. return HAL_OK;
  1967. }
  1968. /**
  1969. * @}
  1970. */
  1971. #endif /* HAL_SPI_MODULE_ENABLED */
  1972. /**
  1973. * @}
  1974. */
  1975. /**
  1976. * @}
  1977. */
  1978. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/